The input (taken on stdin) is a gem5.opt --debug-flags=MemoryAccess trace (--format gem5), or a dump-trace output (--format dump) for easy trace synthesis (for testing purposes). gem5 format: Currently imports physical, not virtual memory addresses. dump format: Currently ignores extended trace information. Change-Id: Ic26a996d6fb9ce4175c855fadcbcff9ac9263888
74 lines
1.7 KiB
C++
74 lines
1.7 KiB
C++
#include <sstream>
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#include <string>
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#include "util/Logger.hpp"
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#include "comm/TracePlugin.pb.h"
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#include "DumpConverter.hpp"
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using namespace fail;
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using std::stringstream;
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using std::endl;
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using std::hex;
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using std::dec;
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static Logger LOG("DumpConverter", true);
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// TODO: convert extended trace information, too
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bool DumpConverter::convert()
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{
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char buf[2048], dummy[1024];
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int64_t prev_cycle = 0, cycle;
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while (m_input.getline(buf, sizeof(buf))) {
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Trace_Event ev;
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// IP 1035c9 t=0
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// MEM R 123abc width 4 IP 1035c9 t=1
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// MEM W 123abc width 4 IP 1035c9 t=1
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std::stringstream ss(buf);
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std::string ev_type;
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ss >> ev_type;
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if (ev_type == "MEM") {
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std::string accesstype;
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uint64_t data_address;
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uint32_t data_width;
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ss >> accesstype >> hex >> data_address >> dummy >> dec >> data_width >> ev_type;
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if (!ss) {
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LOG << "input mismatch (1), input = " << buf << endl;
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continue;
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}
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ev.set_memaddr(data_address);
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ev.set_width(data_width);
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ev.set_accesstype(accesstype == "R" ? ev.READ : ev.WRITE);
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}
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assert(ev_type == "IP");
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uint64_t instr_address;
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ss >> hex >> instr_address >> dummy;
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if (!ss || dummy[0] != 't' || dummy[1] != '=') {
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LOG << "input mismatch (2), input = " << buf << endl;
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continue;
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}
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ev.set_ip(instr_address);
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ss.clear();
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ss.str(dummy + 2);
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ss >> dec >> cycle;
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if (!ss) {
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LOG << "input mismatch (3), input = " << buf << endl;
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continue;
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}
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if (cycle - prev_cycle > 0) {
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ev.set_time_delta(cycle - prev_cycle);
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prev_cycle = cycle;
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} else if (cycle - prev_cycle < 0) {
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LOG << "ignoring time discontinuity " << dec << prev_cycle << " -> " << cycle << endl;
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prev_cycle = cycle;
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}
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m_ps.writeMessage(&ev);
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}
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return true;
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}
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