git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1321 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
84 lines
2.5 KiB
C
84 lines
2.5 KiB
C
/*
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* Copyright (c) 2005-2011 Imperas Software Ltd., www.imperas.com
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*
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* YOUR ACCESS TO THE INFORMATION IN THIS MODEL IS CONDITIONAL
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* UPON YOUR ACCEPTANCE THAT YOU WILL NOT USE OR PERMIT OTHERS
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* TO USE THE INFORMATION FOR THE PURPOSES OF DETERMINING WHETHER
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* IMPLEMENTATIONS OF THE ARM ARCHITECTURE INFRINGE ANY THIRD
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* PARTY PATENTS.
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*
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* THE LICENSE BELOW EXTENDS ONLY TO USE OF THE SOFTWARE FOR
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* MODELING PURPOSES AND SHALL NOT BE CONSTRUED AS GRANTING
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* A LICENSE TO CREATE A HARDWARE IMPLEMENTATION OF THE
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* FUNCTIONALITY OF THE SOFTWARE LICENSED HEREUNDER.
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* YOU MAY USE THE SOFTWARE SUBJECT TO THE LICENSE TERMS BELOW
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* PROVIDED THAT YOU ENSURE THAT THIS NOTICE IS REPLICATED UNMODIFIED
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* AND IN ITS ENTIRETY IN ALL DISTRIBUTIONS OF THE SOFTWARE,
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* MODIFIED OR UNMODIFIED, IN SOURCE CODE OR IN BINARY FORM.
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*
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* Licensed under an Imperas Modfied Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.ovpworld.org/licenses/OVP_MODIFIED_1.0_APACHE_OPEN_SOURCE_LICENSE_2.0.pdf
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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* either express or implied.
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*
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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*/
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#ifndef ARM_MODE_H
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#define ARM_MODE_H
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//
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// Dictionary modes
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//
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typedef enum armModeE {
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// BITMASKS
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ARM_MODE_U = 0x1, // user (unprivileged) mode bitmask
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ARM_MODE_MPU = 0x2, // MPU enabled mode bitmask
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// VALID MODES
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ARM_MODE_PRIV = (0 | 0 | 0 ),
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ARM_MODE_USER = (0 | ARM_MODE_U | 0 ),
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ARM_MODE_PRIV_MPU = (0 | 0 | ARM_MODE_MPU),
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ARM_MODE_USER_MPU = (0 | ARM_MODE_U | ARM_MODE_MPU),
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// CATCHER FOR ARM MODE EXECUTION
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ARM_MODE_ARM,
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// KEEP LAST: for array sizing
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ARM_MODE_LAST
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} armMode;
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//
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// Wait reasons (bitmask)
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//
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typedef enum armDisableE {
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AD_WFE = 0x01, // wait for event
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AD_WFI = 0x02, // wait for interrupt
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AD_LOCKUP = 0x04 // lockup state
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} armDisable;
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//
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// Block mask entries
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//
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typedef enum armBlockMaskE {
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ARM_BM_USE_SP_PROCESS = 0x0001,
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ARM_BM_BIG_ENDIAN = 0x0002,
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ARM_BM_UNALIGNED = 0x0004,
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ARM_BM_CP10 = 0x0008,
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ARM_BM_FPCA = 0x0010,
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ARM_BM_ASPEN = 0x0020,
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ARM_BM_LSPACT = 0x0040,
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} armBlockMask;
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#endif
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