4 Commits

Author	SHA1	Message	Date
unzner	fd102c01ea	Important bugfix: passing the instruction cache entry pointer ... does not account for arrays of instructions provided by one virtual instruction trace cache entry -> passing the current instruction directly. ALUInstr not yet completely tested. git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1704 8c4709b5-6ec9-48aa-a5cd-a96041d1645a	2012-10-01 17:51:34 +00:00
unzner	58822b02f3	Some improvements on L4, and correcting a mistake made in revision 1361 (see mailing list). ... git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1377 8c4709b5-6ec9-48aa-a5cd-a96041d1645a	2012-06-21 14:19:21 +00:00
unzner	bff60aeae3	Additionally passing the current Bochs CPU context and instruction cache entry to BochsController (enables detailed instruction analysis and modification) ... git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1361 8c4709b5-6ec9-48aa-a5cd-a96041d1645a	2012-06-15 16:39:14 +00:00
adrian	2575604b41	Fail* directories reorganized, Code-cleanup (-> coding-style), Typos+comments fixed. ... git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1321 8c4709b5-6ec9-48aa-a5cd-a96041d1645a	2012-06-08 20:09:43 +00:00