Commit Graph

13 Commits

Author SHA1 Message Date
515eb9973b Fail* CPUState: set/getRegisterContent() uses "const Register*" as 1st param
The first parameter (Register* reg) is only used as input (const-correctness).

Change-Id: I5a75a9f7378913e491a8a22872f51a385e910af6
2013-05-07 14:48:36 +02:00
a328a21887 Renamed x86- and ARM-specific source files (for improved readability).
Updated include paths and CMake config appropriately

Change-Id: Ida5045cde0458b3031e64b73853fe5f58ef5a9d6
2013-04-03 16:46:51 +02:00
eb17e9ef82 core/sal: move command-line parameter passing to SC::startup() 2013-03-14 22:29:43 +01:00
3501050548 T32: FailT32 support for Cortex-M3
Currently working:
 - Connect/Disconnect, Read CPU info
 - CMM Script generation and T32 startup via cmake (make runt32)
 - Read/Write Register, Read Program Pointer
 - Read/Write Memory
 - Single Breakpoint
 - Setting Memory Breakpoint

TODO:
 - Fix mock aspect for T32_GetRam.
 - Fix Thumb2 bit in function addresses from ELFReader
 - Evaluate memory breakpoint hit
2013-03-01 12:47:32 +01:00
447411da9a T32: Evalute memory map, RangeListener, MemAccess 2013-02-21 12:32:55 +01:00
205c7ec919 T32: Breakpoint test code
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2107 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-02-16 23:05:07 +00:00
6761268d93 T32: Added BPSingle, central T32 specific api constants
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2106 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-02-16 23:05:04 +00:00
2e16b8873b T32: Memory access.
Still not tested on real T32.

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2105 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-02-16 22:05:02 +00:00
d86d18bced T32: Code cleanup.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2104 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-02-16 22:05:00 +00:00
39a6415001 T32: Integrated Register read/write calls
* Tested without connected Lauterbach.
  T32_* functions are mocked via aspect.

* New target t32cli, for sending T32 command cia cli. (for testing)

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2103 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-02-15 18:06:02 +00:00
hsc
a911ebb353 Revert "explicit aspect activation"
Unfortunately, this does not (yet) work as advertised.  I need to fight another
round of CMake battles before retrying.  Reverting to previous state for now.

This reverts r1753.

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1767 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-10-19 09:45:00 +00:00
hsc
a29ad39f5e explicit aspect activation
ag++ is now called with a list of currently active aspect headers
(ag++ -a aspect1.ah -a aspect2.ah ...).  This resolves several problems at
once:
 -  Build directories may be positioned arbitrarily now, they need not be
    a subdirectory of the project anymore.
 -  Multiple build directories can coexist within the project tree.  Before
    this commit, the generated instantiate-*.ah aspect headers disturbed
    neighboring build trees.
 -  Due to this, the regression test should be runnable much more easily
    now.
 -  The build time was reduced by an average of about 10%.

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1753 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-10-17 15:22:23 +00:00
bfedb10cac Starting support for Lauterbach T32 HW Debugger
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1740 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-10-11 15:25:51 +00:00