Commit Graph

4 Commits

Author SHA1 Message Date
4cb97a7fa5 formatting, typos, comments, details
Change-Id: Iae5f1acb653a694622e9ac2bad93efcfca588f3a
2014-01-22 13:08:13 +01:00
4e3c9e3758 sal: CPU now knows extended trace registers
The extended trace register list is needed in multiple locations; the CPU
class is the logical module to contain this information.

Increased number of x86 registers to be traced; we can remove those
that prove unusable for fault-space pruning later on.

Change-Id: Ic46ecdbc55167a6d92872c190317fc0d1a3ad92d
2013-08-27 13:38:40 +02:00
52723a874e sal: allow register sets to overlap
This allows a register to be a member of multiple UniformRegisterSets.
Needed to architecture-specifically store, e.g., a list of registers to
record in traces.

Change-Id: Ia5d20768540efe252a84df967d43e569f107da3a
2013-08-27 13:38:40 +02:00
a328a21887 Renamed x86- and ARM-specific source files (for improved readability).
Updated include paths and CMake config appropriately

Change-Id: Ida5045cde0458b3031e64b73853fe5f58ef5a9d6
2013-04-03 16:46:51 +02:00