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2 Commits

Author SHA1 Message Date
28fc41da65 Merge branch 'master' of ssh://vamos.informatik.uni-erlangen.de:29418/fail
Change-Id: I35e86d4b367be395121451a86f2731606f43eeff
2013-03-22 16:51:29 +01:00
96bc39c05d T32 Simulator: Basic Instruction set sim for ARMM3
The T32 can simulate bare instruction sets without periphery.
For the Cortex-M3 we have complete NVIC model including Systick Timer.
Currently a simple CiAO can run on the simulator.

TODO:
 - Let memlogger log all memory accesses.
 - Interact with FailT32 for a complete simulation/FI
2013-03-20 17:17:38 +01:00