Commit Graph

10 Commits

Author SHA1 Message Date
8d060ef375 Debian 10: switch to C++14
Some libraries, e.g. protobuf, depend on C++11 now.  As they are
(indirectly) included in some .ah aspect headers, everything has to be
compiled with C++11 enabled now.

This change switches to C++14 globally.

Change-Id: I56a802bd510704d668a2b2c8957e11725fbe98b7
2019-10-21 17:14:51 +02:00
03b4356598 Bugfix: Let Bochs' trigger breakpoint events even in case of rep-instructions
This reverts the solution of a former commit (see git hash e1f6601d8494bcb002e89543a9334e053f0e69d3). All additional changes proposed in that commit have been deleted and the major work is now done by the aspect header BreakRepeatInstr.ah: It ensures the condition in the methods repeat() and repeat_ZF() if (BX_CPU_THIS_PTR async_event) ... to be always true which causes Bochs to leave these methods immediately. This, in turn, involves a call to defineCPULoopJointPoint(), yielding a breakpoint event in Fail.

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2009 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-01-17 13:41:19 +00:00
hsc
1f8dfd01e9 bochs: trace REP/REPZ/REPNZ iterations
This allows single-stepping through REP/REPZ/REPNZ iterations.  We mainly
need this for a little more realistic timing model when, e.g., copying
large memory areas with REP MOVSB.

Be aware that memory-access tracing only works reliably for REPxx-prefixed
instructions if Bochs was configured with --disable-repeat-speedups, as
this Bochs optimization completely circumvents the usual memory access
paths.

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1885 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-11-06 15:43:24 +00:00
hsc
773ad1367d uniform use of comments for Bochs modifications
We need to be able to grep for our manual changes.  It doesn't help to
have variations with "TUDOS" or "BOCHS-MODIFIED" around.  Please
understand "// DanceOS" comments as an abbreviation for "this code was
manually modified and needs to be manually ported once we switch to a
newer version of Bochs."

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1747 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-10-16 16:59:49 +00:00
fd102c01ea Important bugfix: passing the instruction cache entry pointer
does not account for arrays of instructions provided
by one virtual instruction trace cache entry ->
passing the current instruction directly.
ALUInstr not yet completely tested.


git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1704 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-10-01 17:51:34 +00:00
be9d2912f7 Correction - this _is_ necessary for instruction modification
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1702 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-09-27 19:50:31 +00:00
hsc
765c5f6985 fix restore() in case no "natural" async_events occur
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1410 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-07-03 12:38:24 +00:00
bff60aeae3 Additionally passing the current Bochs CPU context and instruction cache entry to BochsController (enables detailed instruction analysis and modification)
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1361 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-06-15 16:39:14 +00:00
hsc
f74c794789 Bochs tweak: properly handle restore() after TimerEvent
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1331 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-06-12 15:13:15 +00:00
2575604b41 Fail* directories reorganized, Code-cleanup (-> coding-style), Typos+comments fixed.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1321 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-06-08 20:09:43 +00:00