7 Commits

Author SHA1 Message Date
b8e706b1a5 T32SIM: Integrating Tracing feature of the T32SIM.
After each simulator break, T32Tracer retrieves the latest (16)
trace records from the T32. Memory address and value can now
be evaluated easily from the trace record.

TODO:Nevertheless we still have to traverse the trace to
find the instruction causing the access.
2013-03-21 18:57:46 +01:00
ad3c185b61 core/util: Added CommandLine interface (for bochs) 2013-03-11 15:29:26 +01:00
010137cf54 T32: Updated to recent T32 API. 2013-03-05 17:29:48 +01:00
3501050548 T32: FailT32 support for Cortex-M3
Currently working:
 - Connect/Disconnect, Read CPU info
 - CMM Script generation and T32 startup via cmake (make runt32)
 - Read/Write Register, Read Program Pointer
 - Read/Write Memory
 - Single Breakpoint
 - Setting Memory Breakpoint

TODO:
 - Fix mock aspect for T32_GetRam.
 - Fix Thumb2 bit in function addresses from ELFReader
 - Evaluate memory breakpoint hit
2013-03-01 12:47:32 +01:00
447411da9a T32: Evalute memory map, RangeListener, MemAccess 2013-02-21 12:32:55 +01:00
2c6a4c2d6e T32: Parsing cli options for T32 fail-client
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2108 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-02-17 17:01:31 +00:00
39a6415001 T32: Integrated Register read/write calls
* Tested without connected Lauterbach.
  T32_* functions are mocked via aspect.

* New target t32cli, for sending T32 command cia cli. (for testing)

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2103 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-02-15 18:06:02 +00:00