move to LLVM 3.9
This change removes support for earlier LLVM versions; making them work as well is simply too tedious. Change-Id: I372a151279ceb2bfd6de101c9e0c15f0a4b18c03
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@ -133,19 +133,27 @@ bool RegisterImporter::handle_ip_event(fail::simtime_t curtime, instruction_coun
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llvm::InitializeAllTargetMCs();
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llvm::InitializeAllDisassemblers();
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if (llvm::error_code ec = createBinary(m_elf->getFilename(), binary)) {
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LOG << m_elf->getFilename() << "': " << ec.message() << ".\n";
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Expected<OwningBinary<Binary>> BinaryOrErr = createBinary(m_elf->getFilename());
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if (!BinaryOrErr) {
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std::string Buf;
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raw_string_ostream OS(Buf);
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logAllUnhandledErrors(std::move(BinaryOrErr.takeError()), OS, "");
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OS.flush();
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LOG << m_elf->getFilename() << "': " << Buf << ".\n";
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return false;
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}
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binary = BinaryOrErr.get().getBinary();
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// necessary due to an AspectC++ bug triggered by LLVM 3.3's dyn_cast()
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#ifndef __puma
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ObjectFile *obj = dyn_cast<ObjectFile>(binary.get());
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ObjectFile *obj = dyn_cast<ObjectFile>(binary);
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disas.reset(new LLVMDisassembler(obj));
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#endif
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disas->disassemble();
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LLVMDisassembler::InstrMap &instr_map = disas->getInstrMap();
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LOG << "instructions disassembled: " << instr_map.size() << " Triple: " << disas->GetTriple() << std::endl;
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m_ltof = disas->getTranslator() ;
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}
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// instruction pointer is read + written at each instruction
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@ -165,12 +173,10 @@ bool RegisterImporter::handle_ip_event(fail::simtime_t curtime, instruction_coun
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const LLVMDisassembler::Instr &opcode = instr_map.at(ev.ip());
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//const MCRegisterInfo ®_info = disas->getRegisterInfo();
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fail::LLVMtoFailTranslator & ltof = disas->getTranslator() ;
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for (std::vector<LLVMDisassembler::register_t>::const_iterator it = opcode.reg_uses.begin();
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it != opcode.reg_uses.end(); ++it) {
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const LLVMtoFailTranslator::reginfo_t &info = ltof.getFailRegisterID(*it);
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if (&info == <of.notfound) {
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const LLVMtoFailTranslator::reginfo_t &info = m_ltof->getFailRegisterID(*it);
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if (&info == &m_ltof->notfound) {
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LOG << "Could not find a mapping for LLVM input register #" << std::dec << *it
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<< " at IP " << std::hex << ev.ip()
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<< ", skipping" << std::endl;
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@ -189,8 +195,8 @@ bool RegisterImporter::handle_ip_event(fail::simtime_t curtime, instruction_coun
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for (std::vector<LLVMDisassembler::register_t>::const_iterator it = opcode.reg_defs.begin();
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it != opcode.reg_defs.end(); ++it) {
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const LLVMtoFailTranslator::reginfo_t &info = ltof.getFailRegisterID(*it);
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if (&info == <of.notfound) {
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const LLVMtoFailTranslator::reginfo_t &info = m_ltof->getFailRegisterID(*it);
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if (&info == &m_ltof->notfound) {
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LOG << "Could not find a mapping for LLVM output register #" << std::dec << *it
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<< " at IP " << std::hex << ev.ip()
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<< ", skipping" << std::endl;
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