Important bugfix: passing the instruction cache entry pointer
does not account for arrays of instructions provided by one virtual instruction trace cache entry -> passing the current instruction directly. ALUInstr not yet completely tested. git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1704 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
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@ -19,7 +19,7 @@ bx_bool interrupt_injection_request = false;
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BochsController::BochsController()
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: SimulatorController(new BochsRegisterManager(), new BochsMemoryManager()),
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m_CPUContext(NULL), m_CacheEntry(NULL)
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m_CPUContext(NULL), m_CurrentInstruction(NULL)
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{
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// -------------------------------------
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// Add the general purpose register:
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@ -116,12 +116,12 @@ void BochsController::onBreakpoint(address_t instrPtr, address_t address_space)
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// implementation.
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}
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void BochsController::updateBPEventInfo(BX_CPU_C *context, bxICacheEntry_c *cacheEntry)
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void BochsController::updateBPEventInfo(BX_CPU_C *context, bxInstruction_c *instr)
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{
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assert(context != NULL && "FATAL ERROR: Bochs internal member was NULL (not expected)!");
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assert(cacheEntry != NULL && "FATAL ERROR: Bochs internal member was NULL (not expected)!");
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assert(instr != NULL && "FATAL ERROR: Bochs internal member was NULL (not expected)!");
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m_CPUContext = context;
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m_CacheEntry = cacheEntry;
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m_CurrentInstruction = instr;
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}
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void BochsController::onIOPort(unsigned char data, unsigned port, bool out) {
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@ -229,7 +229,7 @@ void BochsController::onTimerTrigger(void* thisPtr)
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const std::string& BochsController::getMnemonic() const
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{
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static std::string str;
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bxInstruction_c* pInstr = getICacheEntry()->i;
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bxInstruction_c* pInstr = getCurrentInstruction();
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assert(pInstr != NULL && "FATAL ERROR: Bochs internal member was NULL (not expected)!");
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const char* pszName = get_bx_opcode_name(pInstr->getIaOpcode());
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if (pszName != NULL)
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@ -31,7 +31,7 @@ class BochsController : public SimulatorController {
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private:
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ExperimentFlow* m_CurrFlow; //!< Stores the current flow for save/restore-operations
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BX_CPU_C *m_CPUContext; //!< Additional information that is passed on occurence of a BPEvent
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bxICacheEntry_c *m_CacheEntry; //!< dito.
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bxInstruction_c *m_CurrentInstruction; //!< dito.
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#ifdef DEBUG
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unsigned m_Regularity; //! regularity of instruction ptr output
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unsigned m_Counter; //! current instr-ptr counter
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@ -145,7 +145,7 @@ public:
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* Retrieves the current Bochs instruction cache entry
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* @returns a pointer to a bxICacheEntry_c object
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*/
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inline bxICacheEntry_c *getICacheEntry() const { return m_CacheEntry; }
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inline bxInstruction_c *getCurrentInstruction() const { return m_CurrentInstruction; }
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/**
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* Retrieves the current CPU context
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* @return a pointer to a \c BX_CPU_C object
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@ -157,7 +157,7 @@ public:
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* @param context the CPU context object ptr (Bochs internal=
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* @param cacheEntry the Bochs internal CPU cache entry ptr
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*/
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void updateBPEventInfo(BX_CPU_C *context, bxICacheEntry_c *cacheEntry);
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void updateBPEventInfo(BX_CPU_C *context, bxInstruction_c *instr);
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};
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} // end-of-namespace: fail
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@ -20,10 +20,10 @@ aspect Breakpoints {
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// BX_CPU(0) otherwise
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BX_CPU_C* pThis = *(tjp->arg<0>());
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// Points to the *current* bxInstruction-object
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bxICacheEntry_c* pEntry = *(tjp->arg<1>());
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bxInstruction_c* pInstr = *(tjp->arg<1>());
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// Report this event to the Bochs controller:
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fail::simulator.updateBPEventInfo(pThis, pEntry);
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fail::simulator.updateBPEventInfo(pThis, pInstr);
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fail::simulator.onBreakpoint(pThis->get_instruction_pointer(), pThis->cr3);
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// Note: get_bx_opcode_name(pInstr->getIaOpcode()) retrieves the mnemonics.
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}
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