Important bugfix: passing the instruction cache entry pointer

does not account for arrays of instructions provided
by one virtual instruction trace cache entry ->
passing the current instruction directly.
ALUInstr not yet completely tested.


git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1704 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
This commit is contained in:
unzner
2012-10-01 17:51:34 +00:00
parent 1a9a72eaf4
commit fd102c01ea
13 changed files with 329 additions and 166 deletions

View File

@ -19,7 +19,7 @@ bx_bool interrupt_injection_request = false;
BochsController::BochsController()
: SimulatorController(new BochsRegisterManager(), new BochsMemoryManager()),
m_CPUContext(NULL), m_CacheEntry(NULL)
m_CPUContext(NULL), m_CurrentInstruction(NULL)
{
// -------------------------------------
// Add the general purpose register:
@ -116,12 +116,12 @@ void BochsController::onBreakpoint(address_t instrPtr, address_t address_space)
// implementation.
}
void BochsController::updateBPEventInfo(BX_CPU_C *context, bxICacheEntry_c *cacheEntry)
void BochsController::updateBPEventInfo(BX_CPU_C *context, bxInstruction_c *instr)
{
assert(context != NULL && "FATAL ERROR: Bochs internal member was NULL (not expected)!");
assert(cacheEntry != NULL && "FATAL ERROR: Bochs internal member was NULL (not expected)!");
assert(instr != NULL && "FATAL ERROR: Bochs internal member was NULL (not expected)!");
m_CPUContext = context;
m_CacheEntry = cacheEntry;
m_CurrentInstruction = instr;
}
void BochsController::onIOPort(unsigned char data, unsigned port, bool out) {
@ -229,7 +229,7 @@ void BochsController::onTimerTrigger(void* thisPtr)
const std::string& BochsController::getMnemonic() const
{
static std::string str;
bxInstruction_c* pInstr = getICacheEntry()->i;
bxInstruction_c* pInstr = getCurrentInstruction();
assert(pInstr != NULL && "FATAL ERROR: Bochs internal member was NULL (not expected)!");
const char* pszName = get_bx_opcode_name(pInstr->getIaOpcode());
if (pszName != NULL)

View File

@ -31,7 +31,7 @@ class BochsController : public SimulatorController {
private:
ExperimentFlow* m_CurrFlow; //!< Stores the current flow for save/restore-operations
BX_CPU_C *m_CPUContext; //!< Additional information that is passed on occurence of a BPEvent
bxICacheEntry_c *m_CacheEntry; //!< dito.
bxInstruction_c *m_CurrentInstruction; //!< dito.
#ifdef DEBUG
unsigned m_Regularity; //! regularity of instruction ptr output
unsigned m_Counter; //! current instr-ptr counter
@ -145,7 +145,7 @@ public:
* Retrieves the current Bochs instruction cache entry
* @returns a pointer to a bxICacheEntry_c object
*/
inline bxICacheEntry_c *getICacheEntry() const { return m_CacheEntry; }
inline bxInstruction_c *getCurrentInstruction() const { return m_CurrentInstruction; }
/**
* Retrieves the current CPU context
* @return a pointer to a \c BX_CPU_C object
@ -157,7 +157,7 @@ public:
* @param context the CPU context object ptr (Bochs internal=
* @param cacheEntry the Bochs internal CPU cache entry ptr
*/
void updateBPEventInfo(BX_CPU_C *context, bxICacheEntry_c *cacheEntry);
void updateBPEventInfo(BX_CPU_C *context, bxInstruction_c *instr);
};
} // end-of-namespace: fail

View File

@ -20,10 +20,10 @@ aspect Breakpoints {
// BX_CPU(0) otherwise
BX_CPU_C* pThis = *(tjp->arg<0>());
// Points to the *current* bxInstruction-object
bxICacheEntry_c* pEntry = *(tjp->arg<1>());
bxInstruction_c* pInstr = *(tjp->arg<1>());
// Report this event to the Bochs controller:
fail::simulator.updateBPEventInfo(pThis, pEntry);
fail::simulator.updateBPEventInfo(pThis, pInstr);
fail::simulator.onBreakpoint(pThis->get_instruction_pointer(), pThis->cr3);
// Note: get_bx_opcode_name(pInstr->getIaOpcode()) retrieves the mnemonics.
}