From fb4ba0b104b72e2e08cb5aa7ae79bdbf49a46a75 Mon Sep 17 00:00:00 2001
From: adrian <adrian@8c4709b5-6ec9-48aa-a5cd-a96041d1645a>
Date: Wed, 12 Dec 2012 13:08:12 +0000
Subject: [PATCH] hsc-simple: modifications due to architecure changes in
 r1966.

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1973 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
---
 src/experiments/hsc-simple/experiment.cc | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/src/experiments/hsc-simple/experiment.cc b/src/experiments/hsc-simple/experiment.cc
index 5957e5b2..6ebdb834 100644
--- a/src/experiments/hsc-simple/experiment.cc
+++ b/src/experiments/hsc-simple/experiment.cc
@@ -39,7 +39,8 @@ bool HSCSimpleExperiment::run()
 	simulator.addListenerAndResume(&breakpoint);
 	log << "injecting hellish fault" << endl;
 	// RID_CAX is the RAX register in 64 bit mode and EAX in 32 bit mode:
-	simulator.getRegisterManager().getRegister(RID_CAX)->setData(666);
+	Register* reg = simulator.getCPU(0).getRegister(RID_CAX);
+	simulator.getCPU(0).setRegisterContent(reg, 666);
 	log << "waiting for last main() instruction" << endl;
 	breakpoint.setWatchInstructionPointer(0x3c92);
 	simulator.addListenerAndResume(&breakpoint);
@@ -49,6 +50,6 @@ bool HSCSimpleExperiment::run()
 	simulator.addListenerAndResume(&breakpoint);
 #endif
 
-	simulator.clearListeners(this);
+	simulator.terminate();
 	return true;
 }