import-trace: introduce RegisterImporter
The RegisterImporter disassembles the binary and adds a trace event for each byte read or written from register. The register number (Fail Register Numbers are used) and the offset within the register are encoded within the trace event. Change-Id: I2d2fd720841fedeeff5f28b64f24ec5f6d2ea0c3
This commit is contained in:
@ -6,6 +6,7 @@ set(SRCS
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if (BUILD_LLVM_DISASSEMBLER)
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set(SRCS ${SRCS}
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InstructionImporter.cc
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RegisterImporter.cc
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)
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include(FindLLVM)
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@ -30,5 +31,4 @@ if (BUILD_LLVM_DISASSEMBLER)
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target_link_libraries(import-trace fail-llvmdisassembler fail-sal ${LLVM_LIBS} ${LLVM_LDFLAGS})
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endif (BUILD_LLVM_DISASSEMBLER)
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install(TARGETS import-trace RUNTIME DESTINATION bin)
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@ -64,6 +64,12 @@ public:
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Importer() : m_sanitychecks(false), m_row_count(0), m_time_trace_start(0) {}
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bool init(const std::string &variant, const std::string &benchmark, fail::Database *db);
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/**
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* Callback function that can be used to add command line options
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* to the cmd interface
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*/
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virtual bool cb_commandline_init() { return true; }
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virtual bool create_database();
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virtual bool copy_to_database(fail::ProtoIStream &ps);
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virtual bool clear_database();
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171
tools/import-trace/RegisterImporter.cc
Normal file
171
tools/import-trace/RegisterImporter.cc
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@ -0,0 +1,171 @@
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#ifndef __puma
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#include <sstream>
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#include <iostream>
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#include "RegisterImporter.hpp"
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#include "util/Logger.hpp"
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using namespace llvm;
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using namespace llvm::object;
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using namespace fail;
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static Logger LOG("RegisterImporter");
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/**
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* Callback function that can be used to add command line options
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* to the campaign
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*/
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bool RegisterImporter::cb_commandline_init() {
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CommandLine &cmd = CommandLine::Inst();
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NO_GP = cmd.addOption("", "no-gp", Arg::None,
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"--no-gp\t RegisterImporter: do not inject general purpose registers\n");
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FLAGS = cmd.addOption("", "flags", Arg::None,
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"--flags: RegisterImporter: trace flags register\n");
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IP = cmd.addOption("", "ip", Arg::None,
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"--ip: RegisterImporter: trace instruction pointer\n");
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return true;
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}
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bool RegisterImporter::addRegisterTrace(simtime_t curtime, instruction_count_t instr,
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const Trace_Event &ev,
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const LLVMtoFailTranslator::reginfo_t &info,
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char access_type) {
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LLVMtoFailTranslator::reginfo_t one_byte_window = info;
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one_byte_window.width = 8;
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address_t from = one_byte_window.toDataAddress(), to = one_byte_window.toDataAddress() + (info.width) / 8;
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// Iterate over all accessed bytes
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for (address_t data_address = from; data_address < to; ++data_address) {
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// skip events outside a possibly supplied memory map
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if (m_mm && !m_mm->isMatching(ev.ip())) {
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continue;
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}
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margin_info_t left_margin = getOpenEC(data_address);
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margin_info_t right_margin;
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right_margin.time = curtime;
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right_margin.dyninstr = instr; // !< The current instruction
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right_margin.ip = ev.ip();
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// skip zero-sized intervals: these can occur when an instruction
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// accesses a memory location more than once (e.g., INC, CMPXCHG)
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if (left_margin.dyninstr > right_margin.dyninstr) {
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continue;
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}
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// we now have an interval-terminating R/W event to the memaddr
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// we're currently looking at; the EC is defined by
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// data_address, dynamic instruction start/end, the absolute PC at
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// the end, and time start/end
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access_info_t access;
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access.access_type = access_type; // instruction fetch is always a read
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access.data_address = data_address;
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access.data_width = 1; // exactly one byte
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if (!add_trace_event(left_margin, right_margin, access)) {
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LOG << "add_trace_event failed" << std::endl;
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return false;
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}
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// next interval must start at next instruction; the aforementioned
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// skipping mechanism wouldn't work otherwise
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newOpenEC(data_address, curtime + 1, instr + 1, ev.ip());
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}
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return true;
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}
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bool RegisterImporter::handle_ip_event(fail::simtime_t curtime, instruction_count_t instr,
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const Trace_Event &ev) {
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if (!binary) {
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// Parse command line again, for jump-from and jump-to
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// operations
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CommandLine &cmd = CommandLine::Inst();
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if (!cmd.parse()) {
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std::cerr << "Error parsing arguments." << std::endl;
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return false;
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}
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// Read FROM memory file
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if (cmd[NO_GP].count() > 0) {
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do_gp = false;
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}
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if (cmd[FLAGS].count() > 0) {
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do_flags = true;
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}
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if (cmd[IP].count() > 0) {
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do_ip = true;
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}
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/* Disassemble the binary if necessary */
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llvm::InitializeAllTargetInfos();
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llvm::InitializeAllTargetMCs();
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llvm::InitializeAllDisassemblers();
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if (error_code ec = createBinary(m_elf->getFilename(), binary)) {
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LOG << m_elf->getFilename() << "': " << ec.message() << ".\n";
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return false;
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}
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ObjectFile *obj = dyn_cast<ObjectFile>(binary.get());
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disas.reset(new LLVMDisassembler(obj));
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disas->disassemble();
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LLVMDisassembler::InstrMap &instr_map = disas->getInstrMap();
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LOG << "instructions disassembled: " << instr_map.size() << " Triple: " << disas->GetTriple() << std::endl;
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}
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const LLVMDisassembler::InstrMap &instr_map = disas->getInstrMap();
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if (instr_map.find(ev.ip()) == instr_map.end()) {
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LOG << "Could not find instruction for IP: " << std::hex << ev.ip() << std::endl;
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return false;
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}
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const LLVMDisassembler::Instr &opcode = instr_map.at(ev.ip());
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//const MCRegisterInfo ®_info = disas->getRegisterInfo();
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fail::LLVMtoFailTranslator & ltof = disas->getTranslator() ;
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for (std::vector<LLVMDisassembler::register_t>::const_iterator it = opcode.reg_uses.begin();
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it != opcode.reg_uses.end(); ++it) {
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const LLVMtoFailTranslator::reginfo_t &info = ltof.getFailRegisterID(*it);
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/* if not tracing flags, but flags register -> ignore it
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if not tracing gp, but ! flags -> ignore it*/
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if (info.id == RID_FLAGS && !do_flags)
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continue;
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else if (!do_gp)
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continue;
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if (!addRegisterTrace(curtime, instr, ev, info, 'R')) {
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return false;
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}
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}
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for (std::vector<LLVMDisassembler::register_t>::const_iterator it = opcode.reg_defs.begin();
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it != opcode.reg_defs.end(); ++it) {
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const LLVMtoFailTranslator::reginfo_t &info = ltof.getFailRegisterID(*it);
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/* if not tracing flags, but flags register -> ignore it
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if not tracing gp, but ! flags -> ignore it*/
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if (info.id == RID_FLAGS && !do_flags)
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continue;
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else if (!do_gp)
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continue;
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if (!addRegisterTrace(curtime, instr, ev, info, 'W'))
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return false;
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}
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const LLVMtoFailTranslator::reginfo_t info_pc(RID_PC);
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if (do_ip) {
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if (!addRegisterTrace(curtime, instr, ev, info_pc, 'R'))
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return false;
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if (!addRegisterTrace(curtime, instr, ev, info_pc, 'W'))
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return false;
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}
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return true;
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}
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#endif // !__puma
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49
tools/import-trace/RegisterImporter.hpp
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49
tools/import-trace/RegisterImporter.hpp
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@ -0,0 +1,49 @@
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#ifndef __REGISTER_IMPORTER_H__
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#define __REGISTER_IMPORTER_H__
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#include "util/CommandLine.hpp"
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#include "Importer.hpp"
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#ifndef __puma
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#include "util/llvmdisassembler/LLVMDisassembler.hpp"
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#endif
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class RegisterImporter : public Importer {
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#ifndef __puma
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llvm::OwningPtr<llvm::object::Binary> binary;
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llvm::OwningPtr<fail::LLVMDisassembler> disas;
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bool addRegisterTrace(fail::simtime_t curtime, instruction_count_t instr,
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const Trace_Event &ev,
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const fail::LLVMtoFailTranslator::reginfo_t &info,
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char access_type);
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#endif
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fail::CommandLine::option_handle NO_GP, FLAGS, IP;
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bool do_gp, do_flags, do_ip;
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public:
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RegisterImporter() : Importer(), do_gp(true), do_flags(false), do_ip(false) {}
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/**
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* Callback function that can be used to add command line options
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* to the cmd interface
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*/
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virtual bool cb_commandline_init();
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virtual bool handle_ip_event(fail::simtime_t curtime, instruction_count_t instr,
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const Trace_Event &ev);
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virtual bool handle_mem_event(fail::simtime_t curtime, instruction_count_t instr,
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const Trace_Event &ev) {
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/* ignore on purpose */
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return true;
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}
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virtual void open_unused_ec_intervals() {
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/* empty, Memory Map has a different meaning in this importer */
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}
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};
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#endif
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@ -10,6 +10,7 @@
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#ifdef BUILD_LLVM_DISASSEMBLER
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#include "InstructionImporter.hpp"
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#include "RegisterImporter.hpp"
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#endif
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@ -126,6 +127,9 @@ int main(int argc, char *argv[]) {
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} else if (imp == "InstructionImporter" || imp == "code") {
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LOG << "Using InstructionImporter" << endl;
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importer = new InstructionImporter();
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} else if (imp == "RegisterImporter" || imp == "regs") {
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LOG << "Using RegisterImporter" << endl;
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importer = new RegisterImporter();
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#endif
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} else {
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LOG << "Unkown import method: " << imp << endl;
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