diff --git a/src/core/sal/bochs/Breakpoints.ah b/src/core/sal/bochs/Breakpoints.ah
index beabb2fe..44063768 100644
--- a/src/core/sal/bochs/Breakpoints.ah
+++ b/src/core/sal/bochs/Breakpoints.ah
@@ -24,15 +24,8 @@ aspect Breakpoints {
 		bxInstruction_c* pInstr = *(tjp->arg<1>());
 
 		// Detect the CPU that triggered the change:
-		unsigned i = 0;
-	  #if BX_SUPPORT_SMP
-	    for (; i < BX_SMP_PROCESSORS; i++) {
-			if (BX_CPU_C[i] == pThis) // cmp this ptr with all possible CPU objects
-				break; // index "i" found! -> stop!
-		}
-	  #endif
-		fail::ConcreteCPU& triggerCPU = fail::simulator.getCPU(i);
-		// FIXME: slice ConcreteCPU object reference into BOCHS_CPU -> simplified
+		fail::ConcreteCPU& triggerCPU = fail::simulator.detectCPU(pThis);
+		// FIXME: Slice ConcreteCPU object reference into BOCHS_CPU -> simplified
 
 		// Report this event to the Bochs controller:
 		fail::simulator.updateBPEventInfo(pThis, pInstr);
diff --git a/src/core/sal/bochs/IOPortCom.ah b/src/core/sal/bochs/IOPortCom.ah
index 18fa3722..a0bb35fc 100644
--- a/src/core/sal/bochs/IOPortCom.ah
+++ b/src/core/sal/bochs/IOPortCom.ah
@@ -10,7 +10,6 @@
 #include "cpu/cpu.h"
 
 #include "../SALInst.hpp"
-
 #include "BochsHelpers.hpp"
 
 // TODO: ATM only capturing bytewise output (most common, I suppose)
@@ -22,7 +21,10 @@ aspect IOPortCom {
 	{
 		unsigned rDX = getCPU(tjp->that())->gen_reg[2].word.rx; // port number
 		unsigned char rAL = getCPU(tjp->that())->gen_reg[0].word.byte.rl; // data
-		fail::simulator.onIOPort(rAL, rDX, true);
+		
+		// Detect the CPU that triggered the change:
+		fail::ConcreteCPU& triggerCPU = fail::simulator.detectCPU(getCPU(tjp->that()));
+		fail::simulator.onIOPort(&triggerCPU, rAL, rDX, true);
 	}
 
 	pointcut inInstruction() = "% ...::bx_cpu_c::IN_ALDX(...)";
@@ -31,7 +33,8 @@ aspect IOPortCom {
 	{
 		unsigned rDX = getCPU(tjp->that())->gen_reg[2].word.rx; // port number
 		unsigned char rAL = getCPU(tjp->that())->gen_reg[0].word.byte.rl; // data
-		fail::simulator.onIOPort(rAL, rDX, false);
+		fail::ConcreteCPU& triggerCPU = fail::simulator.detectCPU(getCPU(tjp->that()));
+		fail::simulator.onIOPort(&triggerCPU, rAL, rDX, false);
 	}
 };
 
diff --git a/src/core/sal/bochs/Interrupt.ah b/src/core/sal/bochs/Interrupt.ah
index d926ffc8..0895feeb 100644
--- a/src/core/sal/bochs/Interrupt.ah
+++ b/src/core/sal/bochs/Interrupt.ah
@@ -26,12 +26,15 @@ aspect Interrupt {
 		//    - BX_SOFTWARE_EXCEPTION = 6
 		// Only the first and the second types are relevant for this aspect.  
 
+		// Detect the CPU that triggered the change:
+		fail::ConcreteCPU& triggerCPU = fail::simulator.detectCPU(getCPU(tjp->that()));
+
 		unsigned vector = *(tjp->arg<0>());
 		unsigned type = *(tjp->arg<1>());
 		if (type == BX_EXTERNAL_INTERRUPT)
-			fail::simulator.onInterrupt(vector, false);
+			fail::simulator.onInterrupt(&triggerCPU, vector, false);
 		else if (type == BX_NMI)
-			fail::simulator.onInterrupt(vector, true);
+			fail::simulator.onInterrupt(&triggerCPU, vector, true);
 	}
 };
 
diff --git a/src/core/sal/bochs/InterruptSuppression.ah b/src/core/sal/bochs/InterruptSuppression.ah
index 9500debf..9904d62c 100644
--- a/src/core/sal/bochs/InterruptSuppression.ah
+++ b/src/core/sal/bochs/InterruptSuppression.ah
@@ -15,11 +15,15 @@ aspect InterruptSuppression {
 	pointcut interrupt_method() = "void bx_cpu_c::interrupt(...)";
 
 	advice execution (interrupt_method()) : around ()
-	{	
+	{
+		// Detect the CPU that triggered the change:
+		fail::ConcreteCPU& triggerCPU = fail::simulator.detectCPU(getCPU(tjp->that()));
+
 		unsigned vector = *(tjp->arg<0>());
-		if (!fail::simulator.isSuppressedInterrupt(vector)) {
+		if (!triggerCPU.isSuppressedInterrupt(vector)) {
 			tjp->proceed();
 		}
+		// else: do not process the interrupt
 	}
 };
 
diff --git a/src/core/sal/bochs/Jump.ah b/src/core/sal/bochs/Jump.ah
index bf2920d0..2728623a 100644
--- a/src/core/sal/bochs/Jump.ah
+++ b/src/core/sal/bochs/Jump.ah
@@ -14,6 +14,7 @@
 #include "bochs.h"
 
 #include "../SALInst.hpp"
+#include "BochsHelpers.hpp"
 
 // FIXME: This seems (partial) deprecated/incomplete as well...
 
@@ -61,7 +62,10 @@ aspect Jump {
 	advice execution (defJumpInstructions()) : around()
 	{
 		bxInstruction_c* pInstr = *(tjp->arg<0>()); // bxInstruction_c-object
-		fail::simulator.onJump(true, pInstr->getIaOpcode());
+
+		// Detect the CPU that triggered the change:
+		fail::ConcreteCPU& triggerCPU = fail::simulator.detectCPU(getCPU(tjp->that()));
+		fail::simulator.onJump(&triggerCPU, true, pInstr->getIaOpcode());
 /*
 		JoinPoint::That* pThis = tjp->that();
 		if(pThis == NULL)
@@ -110,7 +114,10 @@ aspect Jump {
 	advice execution (regJumpInstructions()) : around ()
 	{
 		bxInstruction_c* pInstr = *(tjp->arg<0>()); // bxInstruction_c-object
-		fail::simulator.onJump(false, pInstr->getIaOpcode());
+
+		// Detect the CPU that triggered the change:
+		fail::ConcreteCPU& triggerCPU = fail::simulator.detectCPU(getCPU(tjp->that()));
+		fail::simulator.onJump(&triggerCPU, false, pInstr->getIaOpcode());
 /*
 		JoinPoint::That* pThis = tjp->that();
 
diff --git a/src/core/sal/bochs/MemAccess.ah b/src/core/sal/bochs/MemAccess.ah
index 37dbb030..f9f180f3 100644
--- a/src/core/sal/bochs/MemAccess.ah
+++ b/src/core/sal/bochs/MemAccess.ah
@@ -63,14 +63,16 @@ aspect MemAccess {
 #ifdef CONFIG_EVENT_MEMWRITE
 	advice execution (write_methods()) : after ()
 	{
-		fail::simulator.onMemoryAccess(
+		fail::ConcreteCPU& triggerCPU = fail::simulator.detectCPU(getCPU(tjp->that()));
+		fail::simulator.onMemoryAccess(&triggerCPU,
 			*(tjp->arg<1>()), sizeof(*(tjp->arg<2>())), true,
 			getCPU(tjp->that())->prev_rip);
 	}
 
 	advice execution (write_methods_RMW()) : after ()
 	{
-		fail::simulator.onMemoryAccess(
+		fail::ConcreteCPU& triggerCPU = fail::simulator.detectCPU(getCPU(tjp->that()));
+		fail::simulator.onMemoryAccess(&triggerCPU,
 			rmw_address, sizeof(*(tjp->arg<0>())), true,
 			getCPU(tjp->that())->prev_rip);
 	}
@@ -79,7 +81,8 @@ aspect MemAccess {
 	{
 		//std::cerr << "WOOOOOT write_methods_new_stack" << std::endl;
 		// TODO: Log-level?
-		fail::simulator.onMemoryAccess(
+		fail::ConcreteCPU& triggerCPU = fail::simulator.detectCPU(getCPU(tjp->that()));
+		fail::simulator.onMemoryAccess(&triggerCPU,
 			*(tjp->arg<1>()), sizeof(*(tjp->arg<3>())), true,
 			getCPU(tjp->that())->prev_rip);
 	}
@@ -88,7 +91,8 @@ aspect MemAccess {
 	{
 		//std::cerr << "WOOOOOT write_methods_new_stack_64" << std::endl;
 		// TODO: Log-level?
-		fail::simulator.onMemoryAccess(
+		fail::ConcreteCPU& triggerCPU = fail::simulator.detectCPU(getCPU(tjp->that()));
+		fail::simulator.onMemoryAccess(&triggerCPU,
 			*(tjp->arg<0>()), sizeof(*(tjp->arg<2>())), true,
 			getCPU(tjp->that())->prev_rip);
 	}
@@ -100,7 +104,8 @@ aspect MemAccess {
 		// memory (e.g., to read vectors from the interrupt vector
 		// table).
 /*
-		fail::simulator.onMemoryAccess(
+		fail::ConcreteCPU& triggerCPU = fail::simulator.detectCPU(getCPU(tjp->that()));
+		fail::simulator.onMemoryAccess(&triggerCPU,
 			*(tjp->arg<0>()), sizeof(*(tjp->arg<1>())), true,
 			getCPU(tjp->that())->prev_rip);
 */
@@ -116,14 +121,16 @@ aspect MemAccess {
 #ifdef CONFIG_EVENT_MEMREAD
 	advice execution (read_methods()) : before ()
 	{
-		fail::simulator.onMemoryAccess(
+		fail::ConcreteCPU& triggerCPU = fail::simulator.detectCPU(getCPU(tjp->that()));
+		fail::simulator.onMemoryAccess(&triggerCPU,
 			*(tjp->arg<1>()), sizeof(*(tjp->result())), false,
 			getCPU(tjp->that())->prev_rip);
 	}
 
 	advice execution (read_methods_dqword()) : before ()
 	{
-		fail::simulator.onMemoryAccess(
+		fail::ConcreteCPU& triggerCPU = fail::simulator.detectCPU(getCPU(tjp->that()));
+		fail::simulator.onMemoryAccess(&triggerCPU,
 			*(tjp->arg<1>()), 16, false,
 			getCPU(tjp->that())->prev_rip);
 	}
@@ -135,7 +142,8 @@ aspect MemAccess {
 		rmw_address = *(tjp->arg<1>());
 #endif
 #ifdef CONFIG_EVENT_MEMREAD
-		fail::simulator.onMemoryAccess(
+		fail::ConcreteCPU& triggerCPU = fail::simulator.detectCPU(getCPU(tjp->that()));
+		fail::simulator.onMemoryAccess(&triggerCPU,
 			*(tjp->arg<1>()), sizeof(*(tjp->result())), false,
 			getCPU(tjp->that())->prev_rip);
 #endif
@@ -149,7 +157,8 @@ aspect MemAccess {
 		// memory (e.g., to read vectors from the interrupt vector
 		// table).
 /*
-		fail::simulator.onMemoryAccess(
+		fail::ConcreteCPU& triggerCPU = fail::simulator.detectCPU(getCPU(tjp->that()));
+		fail::simulator.onMemoryAccess(&triggerCPU,
 			*(tjp->arg<0>()), sizeof(*(tjp->result())), false,
 			getCPU(tjp->that())->prev_rip);
 */
diff --git a/src/core/sal/bochs/Trap.ah b/src/core/sal/bochs/Trap.ah
index df427dea..0e0d1305 100644
--- a/src/core/sal/bochs/Trap.ah
+++ b/src/core/sal/bochs/Trap.ah
@@ -10,13 +10,16 @@
 #include "cpu/cpu.h"
 
 #include "../SALInst.hpp"
+#include "BochsHelpers.hpp"
 
 aspect Trap {
 	pointcut exception_method() = "void bx_cpu_c::exception(...)";
 
 	advice execution (exception_method()) : before ()
 	{
-		fail::simulator.onTrap(*(tjp->arg<0>()));
+		// Detect the CPU that triggered the change:
+		fail::ConcreteCPU& triggerCPU = fail::simulator.detectCPU(getCPU(tjp->that()));
+		fail::simulator.onTrap(&triggerCPU, *(tjp->arg<0>()));
 		// TODO: There are some different types of exceptions at cpu.h (line 265-281)
 		//       Which kind of traps are these types?
 	}