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Merge branch 'master' of ssh://i4gerrit.informatik.uni-erlangen.de:29418/fail

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This commit is contained in:
Bjoern Doebel
2014-03-27 14:22:29 +01:00
parent dbff3ab236 5378620b63
commit ed46b0730a
39 changed files with 382 additions and 96 deletions
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2
src/CMakeLists.txt
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@ -45,4 +45,4 @@ set(experiment_libraries "")
foreach(exp_or_plugin ${EXPERIMENTS_ACTIVATED} ${PLUGINS_ACTIVATED})
set(experiment_libraries ${experiment_libraries} fail-${exp_or_plugin})
endforeach(exp_or_plugin)
target_link_libraries(fail -Wl,-start-group fail-sal fail-cpn fail-efw fail-comm fail-util ${experiment_libraries} -Wl,-end-group)
target_link_libraries(fail fail-sal fail-cpn fail-efw fail-comm fail-util ${experiment_libraries})

2
src/core/config/CMakeLists.txt
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@ -25,7 +25,7 @@ OPTION(CONFIG_FAST_BREAKPOINTS "Enable fast breakpoints (requires break
OPTION(CONFIG_FAST_WATCHPOINTS "Enable fast watchpoints (requires memory access events to be enabled)" OFF)
SET(SERVER_COMM_HOSTNAME "localhost" CACHE STRING "Job-server hostname or IP")
SET(SERVER_COMM_TCP_PORT "1111" CACHE STRING "Job-server TCP port")
SET(SERVER_OUT_QUEUE_SIZE "10000" CACHE STRING "Queue size for outbound jobs (0 = unlimited)")
SET(SERVER_OUT_QUEUE_SIZE "0" CACHE STRING "Queue size for outbound jobs (0 = unlimited)")
SET(SERVER_PERF_LOG_PATH "perf.log" CACHE STRING "A file name for storing the server's performance log (CSV)")
SET(SERVER_PERF_STEPPING_SEC "1" CACHE STRING "Stepping of performance measurements in seconds")
SET(CLIENT_RAND_BACKOFF_TSTART "3" CACHE STRING "Lower limit of client's backoff phase in seconds")

21
src/core/cpn/DatabaseCampaign.cc
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@ -134,14 +134,15 @@ bool DatabaseCampaign::run_variant(Database::Variant variant) {
* other, collect_result_thread() may even starve until the memory for the
* JobServer's "done" queue runs out, resulting in a crash and the loss of
* all queued results. */
db->query("CREATE TEMPORARY TABLE IF NOT EXISTS result_ids (pilot_id INT NOT NULL PRIMARY KEY)");
db->query("CREATE TEMPORARY TABLE IF NOT EXISTS result_ids (pilot_id INT NOT NULL PRIMARY KEY, count INT NOT NULL)");
db->query("TRUNCATE TABLE result_ids");
std::stringstream ss;
ss << "INSERT INTO result_ids "
<< "SELECT r.pilot_id FROM " << db_connect.result_table() << " r "
<< "SELECT r.pilot_id, COUNT(*) FROM " << db_connect.result_table() << " r "
<< "JOIN fsppilot p ON r.pilot_id = p.id "
<< "WHERE p.fspmethod_id = " << fspmethod_id
<< " AND p.variant_id = " << variant.id;
<< " AND p.variant_id = " << variant.id
<< " GROUP BY r.pilot_id";
db->query(ss.str().c_str());
ss.str("");
@ -149,10 +150,12 @@ bool DatabaseCampaign::run_variant(Database::Variant variant) {
int experiment_count;
std::string sql_select = "SELECT p.id, p.fspmethod_id, p.variant_id, p.injection_instr, p.injection_instr_absolute, p.data_address, p.data_width ";
ss << " FROM fsppilot p "
<< " LEFT JOIN result_ids r ON r.pilot_id = p.id"
<< " WHERE p.fspmethod_id = " << fspmethod_id
<< " AND p.variant_id = " << variant.id
<< " AND (SELECT COUNT(*) FROM result_ids as r WHERE r.pilot_id = p.id)"
<< " AND (r.count"
<< " < " << expected_number_of_results(variant.variant, variant.benchmark)
<< " OR r.count IS NULL)"
<< " ORDER BY p.injection_instr";
std::string sql_body = ss.str();
@ -197,6 +200,16 @@ bool DatabaseCampaign::run_variant(Database::Variant variant) {
log_send << "pushed " << sent_pilots << " pilots into the queue" << std::endl;
}
}
if (*mysql_error(db->getHandle())) {
log_send << "MYSQL ERROR: " << mysql_error(db->getHandle()) << std::endl;
return false;
}
assert(experiment_count == sent_pilots && "ERROR: not all unfinished experiments pushed to queue");
mysql_free_result(pilots);
return true;
}

1
src/core/efw/CMakeLists.txt
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@ -8,6 +8,7 @@ set(SRCS
add_library(fail-efw ${SRCS})
add_dependencies(fail-efw fail-comm)
target_link_libraries(fail-efw fail-comm)
find_package(LibPCL REQUIRED)
include_directories(${LIBPCL_INCLUDE_DIRS})

6
src/core/sal/CMakeLists.txt
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@ -102,4 +102,8 @@ endif(CONFIG_FAST_BREAKPOINTS)
add_library(fail-sal ${SRCS})
add_dependencies(fail-sal fail-efw)
target_link_libraries(fail-sal fail-efw fail-util)
foreach(exp ${EXPERIMENTS_ACTIVATED})
target_link_libraries(fail-sal fail-${exp})
endforeach()

2
src/core/sal/Register.hpp
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@ -24,6 +24,8 @@ enum RegisterType {
RT_FP, //!< floating point register
RT_IP, //!< program counter / instruction pointer
RT_ST, //!< status register
RT_CONTROL, //!< control registers
RT_SEGMENT, //!< segmentation registers
RT_TRACE //!< registers to be recorded in an extended trace
};

112
src/core/sal/bochs/BochsCPU.cc
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@ -14,6 +14,55 @@ regdata_t BochsCPU::getRegisterContent(const Register* reg) const
return static_cast<regdata_t>(BX_CPU(id)->read_eflags());
}
// untested
if (reg->getId() == RID_CR0) { // CR0 register?
return static_cast<regdata_t>(BX_CPU(id)->read_CR0());
}
// untested
if (reg->getId() == RID_CR2) { // CR2 register?
return static_cast<regdata_t>(BX_CPU(id)->cr2);
}
if (reg->getId() == RID_CR3) { // CR3 register?
return static_cast<regdata_t>(BX_CPU(id)->cr3);
}
// untested
if (reg->getId() == RID_CR4) { // CR4 register?
return static_cast<regdata_t>(BX_CPU(id)->read_CR4());
}
// untested
if (reg->getId() == RID_CS) { // CS register?
return static_cast<regdata_t>(BX_CPU(id)->sregs[BX_SEG_REG_CS].selector.value);
}
// untested
if (reg->getId() == RID_DS) { // DS register?
return static_cast<regdata_t>(BX_CPU(id)->sregs[BX_SEG_REG_DS].selector.value);
}
// untested
if (reg->getId() == RID_ES) { // ES register?
return static_cast<regdata_t>(BX_CPU(id)->sregs[BX_SEG_REG_ES].selector.value);
}
// untested
if (reg->getId() == RID_FS) { // FS register?
return static_cast<regdata_t>(BX_CPU(id)->sregs[BX_SEG_REG_FS].selector.value);
}
// untested
if (reg->getId() == RID_GS) { // GS register?
return static_cast<regdata_t>(BX_CPU(id)->sregs[BX_SEG_REG_GS].selector.value);
}
// untested
if (reg->getId() == RID_SS) { // SS register?
return static_cast<regdata_t>(BX_CPU(id)->sregs[BX_SEG_REG_SS].selector.value);
}
#ifdef SIM_SUPPORT_64
if (reg->getId() == RID_PC) // program counter?
return static_cast<regdata_t>(BX_CPU(id)->gen_reg[BX_64BIT_REG_RIP].rrx);
@ -33,9 +82,9 @@ void BochsCPU::setRegisterContent(const Register* reg, regdata_t value)
// TODO: BX_CPU(0) *always* correct?
if (reg->getId() == RID_FLAGS) { // EFLAGS register?
regdata_t regdata = getRegisterContent(reg);
#ifdef SIM_SUPPORT_64
// We are in 64 bit mode: Just assign the lower 32 bits!
regdata_t regdata = getRegisterContent(reg);
BX_CPU(id)->writeEFlags((regdata & 0xFFFFFFFF00000000ULL) | (value & 0xFFFFFFFFULL),
0xffffffff);
#else
@ -45,6 +94,67 @@ void BochsCPU::setRegisterContent(const Register* reg, regdata_t value)
return;
}
#ifndef __puma
// untested
if (reg->getId() == RID_CR0) { // CR0 register?
BX_CPU(id)->SetCR0(value);
return;
}
// untested
if (reg->getId() == RID_CR2) { // CR2 register?
BX_CPU(id)->cr2 = value;
return;
}
if (reg->getId() == RID_CR3) { // CR3 register?
BX_CPU(id)->SetCR3(value);
return;
}
// untested
if (reg->getId() == RID_CR4) { // CR4 register?
BX_CPU(id)->SetCR4(value);
return;
}
// untested
if (reg->getId() == RID_CS) { // CS register?
BX_CPU(id)->load_seg_reg(&BX_CPU(id)->sregs[BX_SEG_REG_CS], value);
return;
}
// untested
if (reg->getId() == RID_DS) { // DS register?
BX_CPU(id)->load_seg_reg(&BX_CPU(id)->sregs[BX_SEG_REG_DS], value);
return;
}
// untested
if (reg->getId() == RID_ES) { // ES register?
BX_CPU(id)->load_seg_reg(&BX_CPU(id)->sregs[BX_SEG_REG_ES], value);
return;
}
// untested
if (reg->getId() == RID_FS) { // FS register?
BX_CPU(id)->load_seg_reg(&BX_CPU(id)->sregs[BX_SEG_REG_FS], value);
return;
}
// untested
if (reg->getId() == RID_GS) { // GS register?
BX_CPU(id)->load_seg_reg(&BX_CPU(id)->sregs[BX_SEG_REG_GS], value);
return;
}
// untested
if (reg->getId() == RID_SS) { // SS register?
BX_CPU(id)->load_seg_reg(&BX_CPU(id)->sregs[BX_SEG_REG_SS], value);
return;
}
#endif
regdata_t* pData;
#ifdef SIM_SUPPORT_64
if (reg->getId() == RID_PC) // program counter?

42
src/core/sal/x86/X86Architecture.cc
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@ -42,6 +42,48 @@ X86Architecture::X86Architecture()
pFlagReg->setName("EFLAGS");
m_addRegister(pFlagReg, RT_ST);
// Add the control registers
Register* pCR0Reg = new Register(RID_CR0, 32);
pCR0Reg->setName("CR0");
m_addRegister(pCR0Reg, RT_CONTROL);
Register* pCR2Reg = new Register(RID_CR2, 32);
pCR2Reg->setName("CR2");
m_addRegister(pCR2Reg, RT_CONTROL);
Register* pCR3Reg = new Register(RID_CR3, 32);
pCR3Reg->setName("CR3");
m_addRegister(pCR3Reg, RT_CONTROL);
Register* pCR4Reg = new Register(RID_CR4, 32);
pCR4Reg->setName("CR4");
m_addRegister(pCR4Reg, RT_CONTROL);
// Add the segment selector registers
Register* pCSReg = new Register(RID_CS, 16);
pCSReg->setName("CS");
m_addRegister(pCSReg, RT_SEGMENT);
Register* pDSReg = new Register(RID_DS, 16);
pDSReg->setName("DS");
m_addRegister(pDSReg, RT_SEGMENT);
Register* pESReg = new Register(RID_ES, 16);
pESReg->setName("ES");
m_addRegister(pESReg, RT_SEGMENT);
Register* pFSReg = new Register(RID_FS, 16);
pFSReg->setName("FS");
m_addRegister(pFSReg, RT_SEGMENT);
Register* pGSReg = new Register(RID_GS, 16);
pGSReg->setName("GS");
m_addRegister(pGSReg, RT_SEGMENT);
Register* pSSReg = new Register(RID_SS, 16);
pSSReg->setName("SS");
m_addRegister(pSSReg, RT_SEGMENT);
// Registers used for extended tracing:
size_t ids[] = {RID_CAX, RID_CBX, RID_CCX, RID_CDX, RID_CSI, RID_CDI, RID_CSP, RID_CBP, RID_FLAGS};
for (size_t i = 0; i < sizeof(ids)/sizeof(*ids); ++i) {

29
src/core/sal/x86/X86Architecture.hpp
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@ -29,14 +29,18 @@ typedef X86Architecture Architecture;
* in case the activated simulator has 64 bit ability.
*/
enum GPRegisterId {
#ifdef SIM_SUPPORT_64 // 64 bit register id's:
#ifdef SIM_SUPPORT_64 // 64 bit register IDs:
RID_RAX = 0, RID_RCX, RID_RDX, RID_RBX, RID_RSP, RID_RBP, RID_RSI, RID_RDI,
RID_R8, RID_R9, RID_R10, RID_R11, RID_R12, RID_R13, RID_R14, RID_R15,
#else // 32 bit register id's:
#else // 32 bit register IDs:
RID_EAX = 0, RID_ECX, RID_EDX, RID_EBX, RID_ESP, RID_EBP, RID_ESI, RID_EDI,
#endif // common register id's (independent of the current register width):
RID_CAX = 0, RID_CCX, RID_CDX, RID_CBX, RID_CSP, RID_CBP, RID_CSI, RID_CDI,
RID_LAST_GP_ID
// skip a few IDs to get identical numbers for special-purpose registers in
// 32 and 64 bit setups:
SKIP_64BIT_IDS = 15,
#endif
RID_LAST_GP_ID,
// common register IDs (independent of the current register width):
RID_CAX = 0, RID_CCX, RID_CDX, RID_CBX, RID_CSP, RID_CBP, RID_CSI, RID_CDI
};
/**
@ -50,7 +54,20 @@ enum PCRegisterId { RID_PC = RID_LAST_GP_ID, RID_LAST_PC_ID };
* \enum FlagsRegisterId
* Symbolic identifier to access the flags register.
*/
enum FlagsRegisterId { RID_FLAGS = RID_LAST_PC_ID };
enum FlagsRegisterId { RID_FLAGS = RID_LAST_PC_ID, RID_LAST_FLAGS_ID };
/**
* \enum SegmentRegisterId
* Symbolic identifier to access the segment register.
*/
enum SegmentRegisterId { RID_CS = RID_LAST_FLAGS_ID, RID_DS, RID_ES, RID_FS,
RID_GS, RID_SS, RID_LAST_SEGMENT_ID};
/**
* \enum ControlRegisterId
* Symbolic identifier to access the control register.
*/
enum ControlRegisterId { RID_CR0 = RID_LAST_SEGMENT_ID, RID_CR1, RID_CR2, RID_CR3, RID_CR4 };
} // end-of-namespace: fail

1
src/core/util/CMakeLists.txt
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@ -67,6 +67,7 @@ mark_as_advanced(FAIL_OBJDUMP)
add_library(fail-util ${SRCS})
add_dependencies(fail-util fail-comm)
target_link_libraries(fail-util fail-comm)
target_link_libraries(fail-util ${PROTOBUF_LIBRARY} ${Boost_LIBRARIES} ${LIB_IBERTY} ${ZLIB_LIBRARIES} dwarf elf)
option(BUILD_LLVM_DISASSEMBLER "Build the LLVM-based disassembler (LLVM 3.3 preferred, for 3.1 and 3.2 read doc/how-to-build.txt)" OFF)

2
src/core/util/llvmdisassembler/CMakeLists.txt
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@ -15,7 +15,7 @@ include(FindLLVM)
set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} ${LLVM_CXX_FLAGS} -fno-rtti" )
add_library(fail-llvmdisassembler ${SRCS})
add_dependencies(fail-llvmdisassembler fail-sal)
target_link_libraries(fail-llvmdisassembler fail-sal)
target_link_libraries(fail-llvmdisassembler ${LLVM_LIBS} ${LLVM_LDFLAGS} )
### Tests

4
src/core/util/llvmdisassembler/LLVMDisassembler.cpp
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@ -12,10 +12,10 @@ LLVMtoFailTranslator & LLVMDisassembler::getTranslator() {
switch ( llvm::Triple::ArchType(object->getArch()) ) {
case llvm::Triple::x86:
case llvm::Triple::x86_64:
ltofail = new LLVMtoFailBochs;
ltofail = new LLVMtoFailBochs(this);
break;
case llvm::Triple::arm:
ltofail = new LLVMtoFailGem5;
ltofail = new LLVMtoFailGem5(this);
break;
default:
std::cout << " not supported :(";

86
src/core/util/llvmdisassembler/LLVMtoFailBochs.cpp
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@ -1,48 +1,68 @@
#include "LLVMDisassembler.hpp"
#include "LLVMtoFailBochs.hpp"
#include "sal/x86/X86Architecture.hpp"
using namespace fail;
LLVMtoFailBochs::LLVMtoFailBochs() {
/* These magic numbers are taken from the llvm compiler (MC), they
do not appear in any header. They hopefully will never
change */
llvm_to_fail_map[1] = reginfo_t(RID_CAX, 8, 8) ; // AH
llvm_to_fail_map[2] = reginfo_t(RID_CAX, 8, 0); // AL
llvm_to_fail_map[3] = reginfo_t(RID_CAX, 16, 0); // AX
llvm_to_fail_map[43] = reginfo_t(RID_CAX, 32, 0); // EAX
LLVMtoFailBochs::LLVMtoFailBochs(LLVMDisassembler *disas) {
std::map<std::string, struct reginfo_t> reg_name_map;
llvm_to_fail_map[4] = reginfo_t(RID_CBX, 8, 8); // BH
llvm_to_fail_map[5] = reginfo_t(RID_CBX, 8, 0); // BL
llvm_to_fail_map[8] = reginfo_t(RID_CBX, 16, 0); // BX
llvm_to_fail_map[45] = reginfo_t(RID_CBX, 32, 0); // EBX
reg_name_map["AH"] = reginfo_t(RID_CAX, 8, 8);
reg_name_map["AL"] = reginfo_t(RID_CAX, 8, 0);
reg_name_map["AX"] = reginfo_t(RID_CAX, 16, 0);
reg_name_map["EAX"] = reginfo_t(RID_CAX, 32, 0);
llvm_to_fail_map[9] = reginfo_t(RID_CCX, 8, 8); // CH
llvm_to_fail_map[10] = reginfo_t(RID_CCX, 8, 0); // CL
llvm_to_fail_map[28] = reginfo_t(RID_CCX, 16, 0); // CX
llvm_to_fail_map[46] = reginfo_t(RID_CCX); // ECX
reg_name_map["BH"] = reginfo_t(RID_CBX, 8, 8);
reg_name_map["BL"] = reginfo_t(RID_CBX, 8, 0);
reg_name_map["BX"] = reginfo_t(RID_CBX, 16, 0);
reg_name_map["EBX"] = reginfo_t(RID_CBX, 32, 0);
llvm_to_fail_map[29] = reginfo_t(RID_CDX, 8, 8); // DH
llvm_to_fail_map[32] = reginfo_t(RID_CDX, 8, 0); // DL
llvm_to_fail_map[42] = reginfo_t(RID_CDX, 16, 0); // DX
llvm_to_fail_map[48] = reginfo_t(RID_CDX); // EDX
reg_name_map["CH"] = reginfo_t(RID_CCX, 8, 8);
reg_name_map["CL"] = reginfo_t(RID_CCX, 8, 0);
reg_name_map["CX"] = reginfo_t(RID_CCX, 16, 0);
reg_name_map["ECX"] = reginfo_t(RID_CCX);
llvm_to_fail_map[30] = reginfo_t(RID_CDI, 16, 0); // DI
llvm_to_fail_map[31] = reginfo_t(RID_CDI, 8, 0); // DIL
llvm_to_fail_map[47] = reginfo_t(RID_CDI); // EDI
reg_name_map["DH"] = reginfo_t(RID_CDX, 8, 8);
reg_name_map["DL"] = reginfo_t(RID_CDX, 8, 0);
reg_name_map["DX"] = reginfo_t(RID_CDX, 16, 0);
reg_name_map["EDX"] = reginfo_t(RID_CDX);
llvm_to_fail_map[6] = reginfo_t(RID_CBP, 16, 0); // BP
llvm_to_fail_map[7] = reginfo_t(RID_CBP, 8, 0); // BPL
llvm_to_fail_map[44] = reginfo_t(RID_CBP); // EBP
reg_name_map["DI"] = reginfo_t(RID_CDI, 16, 0);
reg_name_map["DIL"] = reginfo_t(RID_CDI, 8, 0);
reg_name_map["EDI"] = reginfo_t(RID_CDI);
llvm_to_fail_map[49] = reginfo_t(RID_FLAGS); // EFLAGS
reg_name_map["BP"] = reginfo_t(RID_CBP, 16, 0);
reg_name_map["BPL"] = reginfo_t(RID_CBP, 8, 0);
reg_name_map["EBP"] = reginfo_t(RID_CBP);
llvm_to_fail_map[50] = reginfo_t(RID_PC); // EIP
reg_name_map["EFLAGS"] = reginfo_t(RID_FLAGS);
llvm_to_fail_map[115] = reginfo_t(RID_CSI, 16, 0); // SI
llvm_to_fail_map[53] = reginfo_t(RID_CSI); // ESI
reg_name_map["EIP"] = reginfo_t(RID_PC);
llvm_to_fail_map[54] = reginfo_t(RID_CSP); // ESP
llvm_to_fail_map[117] = reginfo_t(RID_CSP, 16, 0); // SP
llvm_to_fail_map[118] = reginfo_t(RID_CSP, 8, 0); // SPL
reg_name_map["SI"] = reginfo_t(RID_CSI, 16, 0);
reg_name_map["ESI"] = reginfo_t(RID_CSI);
reg_name_map["ESP"] = reginfo_t(RID_CSP);
reg_name_map["SP"] = reginfo_t(RID_CSP, 16, 0);
reg_name_map["SPL"] = reginfo_t(RID_CSP, 8, 0);
reg_name_map["CR0"] = reginfo_t(RID_CR0);
reg_name_map["CR2"] = reginfo_t(RID_CR2);
reg_name_map["CR3"] = reginfo_t(RID_CR3);
reg_name_map["CR4"] = reginfo_t(RID_CR4);
reg_name_map["CS"] = reginfo_t(RID_CS, 16, 0);
reg_name_map["DS"] = reginfo_t(RID_DS, 16, 0);
reg_name_map["ES"] = reginfo_t(RID_ES, 16, 0);
reg_name_map["FS"] = reginfo_t(RID_FS, 16, 0);
reg_name_map["GS"] = reginfo_t(RID_GS, 16, 0);
reg_name_map["SS"] = reginfo_t(RID_SS, 16, 0);
const llvm::MCRegisterInfo &reg_info = disas->getRegisterInfo();
for (unsigned int i = 0; i < reg_info.getNumRegs(); ++i){
std::string name = reg_info.getName(i);
if (reg_name_map.count(name) > 0) {
llvm_to_fail_map[i] = reg_name_map[name];
}
}
}

4
src/core/util/llvmdisassembler/LLVMtoFailBochs.hpp
View File

@ -7,11 +7,13 @@
namespace fail {
class LLVMDisassembler;
class LLVMtoFailBochs : public LLVMtoFailTranslator {
public:
LLVMtoFailBochs();
LLVMtoFailBochs(LLVMDisassembler *disas);
};
} // end of namespace

48
src/core/util/llvmdisassembler/LLVMtoFailGem5.cpp
View File

@ -1,26 +1,34 @@
#include "LLVMDisassembler.hpp"
#include "LLVMtoFailGem5.hpp"
#include "sal/arm/ArmArchitecture.hpp"
using namespace fail;
LLVMtoFailGem5::LLVMtoFailGem5() {
/* These magic numbers are taken from the machine descriptions of
LLVM they (hopefully) will not change, since they are not exported
via a header */
llvm_to_fail_map[60] = reginfo_t(RI_R0);
llvm_to_fail_map[61] = reginfo_t(RI_R1);
llvm_to_fail_map[62] = reginfo_t(RI_R2);
llvm_to_fail_map[63] = reginfo_t(RI_R3);
llvm_to_fail_map[64] = reginfo_t(RI_R4);
llvm_to_fail_map[65] = reginfo_t(RI_R5);
llvm_to_fail_map[66] = reginfo_t(RI_R6);
llvm_to_fail_map[67] = reginfo_t(RI_R7);
llvm_to_fail_map[68] = reginfo_t(RI_R8);
llvm_to_fail_map[69] = reginfo_t(RI_R9);
llvm_to_fail_map[70] = reginfo_t(RI_R10);
llvm_to_fail_map[71] = reginfo_t(RI_R11);
llvm_to_fail_map[72] = reginfo_t(RI_R12);
llvm_to_fail_map[105] = reginfo_t(RI_SP);
llvm_to_fail_map[40] = reginfo_t(RI_LR);
llvm_to_fail_map[43] = reginfo_t(RI_IP);
LLVMtoFailGem5::LLVMtoFailGem5(LLVMDisassembler *disas) {
std::map<std::string, struct reginfo_t> reg_name_map;
reg_name_map["R0"] = reginfo_t(RI_R0);
reg_name_map["R1"] = reginfo_t(RI_R1);
reg_name_map["R2"] = reginfo_t(RI_R2);
reg_name_map["R3"] = reginfo_t(RI_R3);
reg_name_map["R4"] = reginfo_t(RI_R4);
reg_name_map["R5"] = reginfo_t(RI_R5);
reg_name_map["R6"] = reginfo_t(RI_R6);
reg_name_map["R7"] = reginfo_t(RI_R7);
reg_name_map["R8"] = reginfo_t(RI_R8);
reg_name_map["R9"] = reginfo_t(RI_R9);
reg_name_map["R10"] = reginfo_t(RI_R10);
reg_name_map["R11"] = reginfo_t(RI_R11);
reg_name_map["R12"] = reginfo_t(RI_R12);
reg_name_map["SP"] = reginfo_t(RI_SP);
reg_name_map["LR"] = reginfo_t(RI_LR);
reg_name_map["PC"] = reginfo_t(RI_IP);
const llvm::MCRegisterInfo &reg_info = disas->getRegisterInfo();
for (unsigned int i = 0; i < reg_info.getNumRegs(); ++i){
std::string name = reg_info.getName(i);
if (reg_name_map.count(name) > 0) {
llvm_to_fail_map[i] = reg_name_map[name];
}
}
}

4
src/core/util/llvmdisassembler/LLVMtoFailGem5.hpp
View File

@ -7,11 +7,13 @@
namespace fail {
class LLVMDisassembler;
class LLVMtoFailGem5 : public LLVMtoFailTranslator {
public:
LLVMtoFailGem5();
LLVMtoFailGem5(LLVMDisassembler *disas);
};
} // end of namespace

20
src/core/util/llvmdisassembler/LLVMtoFailTranslator.cpp
View File

@ -1,7 +1,10 @@
#include "LLVMDisassembler.hpp"
#include "LLVMtoFailTranslator.hpp"
#include "sal/SALInst.hpp"
using namespace fail;
using namespace llvm;
using namespace llvm::object;
const LLVMtoFailTranslator::reginfo_t & LLVMtoFailTranslator::getFailRegisterID(unsigned int regid) {
ltof_map_t::iterator it = llvm_to_fail_map.find(regid);
@ -38,3 +41,20 @@ void LLVMtoFailTranslator::setRegisterContent(ConcreteCPU & cpu, const reginfo_t
cpu.setRegisterContent( reg, value ); // write back register content
}
LLVMtoFailTranslator* LLVMtoFailTranslator::createFromBinary(const std::string elf_path) {
llvm_shutdown_obj Y;
llvm::InitializeAllTargetInfos();
llvm::InitializeAllTargetMCs();
llvm::InitializeAllDisassemblers();
OwningPtr<Binary> binary;
assert(createBinary(elf_path, binary) == 0);
#ifndef __puma
LLVMDisassembler disas(dyn_cast<ObjectFile>(binary.get()));
return &disas.getTranslator();
#else
return 0;
#endif
}

2
src/core/util/llvmdisassembler/LLVMtoFailTranslator.hpp
View File

@ -68,6 +68,8 @@ public:
int getFailRegisterId(unsigned int regid) { return this->getFailRegisterID(regid).id; };
reginfo_t notfound;
static LLVMtoFailTranslator* createFromBinary(const std::string elf_path);
};
} // end of namespace

3
src/experiments/checksum-oostubs/CMakeLists.txt
View File

@ -25,7 +25,8 @@ PROTOBUF_GENERATE_CPP(PROTO_SRCS PROTO_HDRS ${MY_PROTOS})
## Build library
add_library(fail-${EXPERIMENT_NAME} ${PROTO_SRCS} ${PROTO_HDRS} ${MY_CAMPAIGN_SRCS})
add_dependencies(fail-${EXPERIMENT_NAME} fail-tracing fail-comm)
add_dependencies(fail-${EXPERIMENT_NAME} fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME} fail-tracing fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME} ${PROTOBUF_LIBRARY})
## This is the example's campaign server distributing experiment parameters

3
src/experiments/cool-checksum/CMakeLists.txt
View File

@ -25,7 +25,8 @@ PROTOBUF_GENERATE_CPP(PROTO_SRCS PROTO_HDRS ${MY_PROTOS})
## Build library
add_library(fail-${EXPERIMENT_NAME} ${PROTO_SRCS} ${PROTO_HDRS} ${MY_CAMPAIGN_SRCS})
add_dependencies(fail-${EXPERIMENT_NAME} fail-tracing fail-comm)
add_dependencies(fail-${EXPERIMENT_NAME} fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME} fail-tracing fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME} ${PROTOBUF_LIBRARY})
## This is the example's campaign server distributing experiment parameters

1
src/experiments/cored-voter/CMakeLists.txt
View File

@ -26,6 +26,7 @@ PROTOBUF_GENERATE_CPP(PROTO_SRCS PROTO_HDRS ${MY_PROTOS})
## Build library
add_library(fail-${EXPERIMENT_NAME} ${PROTO_SRCS} ${PROTO_HDRS} ${MY_CAMPAIGN_SRCS})
add_dependencies(fail-${EXPERIMENT_NAME} fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME} fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME} ${PROTOBUF_LIBRARY} fail-llvmdisassembler)
## This is the example's campaign server distributing experiment parameters

1
src/experiments/dciao-kernelstructs/CMakeLists.txt
View File

@ -29,6 +29,7 @@ PROTOBUF_GENERATE_CPP(PROTO_SRCS PROTO_HDRS ${MY_PROTOS})
## Build library
add_library(fail-${EXPERIMENT_NAME} ${PROTO_SRCS} ${PROTO_HDRS} ${MY_CAMPAIGN_SRCS})
add_dependencies(fail-${EXPERIMENT_NAME} fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME} fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME} ${PROTOBUF_LIBRARY})
## This is the example's campaign server distributing experiment parameters

3
src/experiments/ecos_kernel_test/CMakeLists.txt
View File

@ -29,7 +29,8 @@ PROTOBUF_GENERATE_CPP(PROTO_SRCS PROTO_HDRS ${MY_PROTOS})
## Build library
add_library(fail-${EXPERIMENT_NAME} ${PROTO_SRCS} ${PROTO_HDRS} ${MY_CAMPAIGN_SRCS})
add_dependencies(fail-${EXPERIMENT_NAME} fail-tracing fail-comm)
add_dependencies(fail-${EXPERIMENT_NAME} fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME} fail-tracing fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME} ${PROTOBUF_LIBRARY} ${MYSQL_LIBRARIES})
## This is the example's campaign server distributing experiment parameters

1
src/experiments/ezs-logger/CMakeLists.txt
View File

@ -16,5 +16,6 @@ set(MY_CAMPAIGN_SRCS
## Build library
add_library(fail-${EXPERIMENT_NAME} ${MY_CAMPAIGN_SRCS})
add_dependencies(fail-${EXPERIMENT_NAME} fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME} fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME})

3
src/experiments/generic-tracing/CMakeLists.txt
View File

@ -14,4 +14,5 @@ include_directories(${CMAKE_CURRENT_BINARY_DIR})
## Build library
add_library(fail-${EXPERIMENT_NAME} ${PROTO_SRCS} ${PROTO_HDRS} ${MY_CAMPAIGN_SRCS})
add_dependencies(fail-${EXPERIMENT_NAME} fail-tracing)
add_dependencies(fail-${EXPERIMENT_NAME} fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME} fail-tracing fail-comm)

8
src/experiments/generic-tracing/experiment.cc
View File

@ -20,6 +20,11 @@
using namespace std;
using namespace fail;
// Check if configuration dependencies are satisfied:
#if !defined(CONFIG_EVENT_BREAKPOINTS) || !defined(CONFIG_SR_SAVE)
#error This experiment needs: breakpoints, and save. Enable these in the configuration.
#endif
void GenericTracing::parseOptions() {
CommandLine &cmd = CommandLine::Inst();
cmd.addOption("", "", Arg::None, "USAGE: fail-client -Wf,[option] -Wf,[option] ... <BochsOptions...>\n\n");
@ -36,7 +41,8 @@ void GenericTracing::parseOptions() {
"-S,--save-symbol \tELF symbol to save the state of the machine "
"(exists for backward compatibility, must be identical to --start-symbol if used)\n");
CommandLine::option_handle STATE_FILE = cmd.addOption("f", "state-file", Arg::Required,
"-f,--state-file \tFile/dir to save the state to (default: state)");
"-f,--state-file \tFile/dir to save the state to (default: state). "
"Use /dev/null if no state is required");
CommandLine::option_handle TRACE_FILE = cmd.addOption("t", "trace-file", Arg::Required,
"-t,--trace-file \tFile to save the execution trace to (default: trace.pb)\n");

1
src/experiments/kesorefs/CMakeLists.txt
View File

@ -29,6 +29,7 @@ PROTOBUF_GENERATE_CPP(PROTO_SRCS PROTO_HDRS ${MY_PROTOS})
## Build library
add_library(fail-${EXPERIMENT_NAME} ${PROTO_SRCS} ${PROTO_HDRS} ${MY_CAMPAIGN_SRCS})
add_dependencies(fail-${EXPERIMENT_NAME} fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME} fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME} ${PROTOBUF_LIBRARY})
## This is the example's campaign server distributing experiment parameters

1
src/experiments/l4-sys/CMakeLists.txt
View File

@ -38,6 +38,7 @@ find_package(LibUdis86 REQUIRED)
include_directories(${LIBUDIS86_INCLUDE_DIRS})
link_directories(${LIBUDIS86_LINK_DIRS})
add_dependencies(fail-${EXPERIMENT_NAME} fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME} fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME} ${LIBUDIS86_LIBRARIES} ${PROTOBUF_LIBRARY})
## This is the example's campaign server distributing experiment parameters

1
src/experiments/mh-test-campaign/CMakeLists.txt
View File

@ -26,6 +26,7 @@ PROTOBUF_GENERATE_CPP(PROTO_SRCS PROTO_HDRS ${MY_PROTOS})
## Build library
add_library(fail-${EXPERIMENT_NAME} ${PROTO_SRCS} ${PROTO_HDRS} ${MY_CAMPAIGN_SRCS})
add_dependencies(fail-${EXPERIMENT_NAME} fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME} fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME} ${PROTOBUF_LIBRARY})
## This is the example's campaign server distributing experiment parameters

3
src/experiments/nanojpeg/CMakeLists.txt
View File

@ -39,7 +39,8 @@ link_directories(${LIBUDIS86_LINK_DIRS})
## Build library
add_library(fail-${EXPERIMENT_NAME} ${PROTO_SRCS} ${PROTO_HDRS} ${MY_CAMPAIGN_SRCS})
add_dependencies(fail-${EXPERIMENT_NAME} fail-tracing fail-comm)
add_dependencies(fail-${EXPERIMENT_NAME} fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME} fail-tracing fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME} ${LIBUDIS86_LIBRARIES} ${PROTOBUF_LIBRARY})
## This is the example's campaign server distributing experiment parameters

1
src/experiments/rampage/CMakeLists.txt
View File

@ -27,6 +27,7 @@ PROTOBUF_GENERATE_CPP(PROTO_SRCS PROTO_HDRS ${MY_PROTOS})
## Build library
add_library(fail-${EXPERIMENT_NAME} ${PROTO_SRCS} ${PROTO_HDRS} ${MY_CAMPAIGN_SRCS})
add_dependencies(fail-${EXPERIMENT_NAME} fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME} fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME} ${PROTOBUF_LIBRARY})
## This is the example's campaign server distributing experiment parameters

2
src/experiments/tracing-test/CMakeLists.txt
View File

@ -14,4 +14,4 @@ include_directories(${CMAKE_CURRENT_BINARY_DIR})
## Build library
add_library(fail-${EXPERIMENT_NAME} ${PROTO_SRCS} ${PROTO_HDRS} ${MY_CAMPAIGN_SRCS})
add_dependencies(fail-${EXPERIMENT_NAME} fail-tracing)
target_link_libraries(fail-${EXPERIMENT_NAME} fail-tracing)

1
src/experiments/vezs-example/CMakeLists.txt
View File

@ -26,6 +26,7 @@ include_directories(${CMAKE_CURRENT_BINARY_DIR})
## Build library
add_library(fail-${EXPERIMENT_NAME} ${PROTO_SRCS} ${PROTO_HDRS} ${MY_CAMPAIGN_SRCS})
add_dependencies(fail-${EXPERIMENT_NAME} fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME} fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME} ${PROTOBUF_LIBRARY})
## This is the example's campaign server distributing experiment parameters

3
src/experiments/weather-monitor-gem5/CMakeLists.txt
View File

@ -26,7 +26,8 @@ PROTOBUF_GENERATE_CPP(PROTO_SRCS PROTO_HDRS ${MY_PROTOS})
## Build library
add_library(fail-${EXPERIMENT_NAME} ${PROTO_SRCS} ${PROTO_HDRS} ${MY_CAMPAIGN_SRCS})
add_dependencies(fail-${EXPERIMENT_NAME} fail-tracing fail-comm)
add_dependencies(fail-${EXPERIMENT_NAME} fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME} fail-tracing fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME} ${PROTOBUF_LIBRARY})
## This is the example's campaign server distributing experiment parameters

3
src/experiments/weather-monitor/CMakeLists.txt
View File

@ -26,7 +26,8 @@ PROTOBUF_GENERATE_CPP(PROTO_SRCS PROTO_HDRS ${MY_PROTOS})
## Build library
add_library(fail-${EXPERIMENT_NAME} ${PROTO_SRCS} ${PROTO_HDRS} ${MY_CAMPAIGN_SRCS})
add_dependencies(fail-${EXPERIMENT_NAME} fail-tracing fail-comm)
add_dependencies(fail-${EXPERIMENT_NAME} fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME} fail-tracing fail-comm)
target_link_libraries(fail-${EXPERIMENT_NAME} ${PROTOBUF_LIBRARY})
## This is the example's campaign server distributing experiment parameters

3
src/plugins/tracing/CMakeLists.txt
View File

@ -9,5 +9,4 @@ include_directories(${CMAKE_CURRENT_BINARY_DIR})
## Build library
add_library(fail-${PLUGIN_NAME} ${MY_PLUGIN_SRCS})
add_dependencies(fail-${PLUGIN_NAME} fail-comm)
target_link_libraries(fail-${PLUGIN_NAME})
target_link_libraries(fail-${PLUGIN_NAME} fail-sal fail-cpn fail-efw fail-comm)

4
src/plugins/tracing/TracingPlugin.cc
View File

@ -107,7 +107,9 @@ bool TracingPlugin::run()
if (m_full_trace) {
Trace_Event_Extended &ext = *e.mutable_trace_ext();
// Read the accessed data
assert(width <= 8);
if (width > 8) {
width = 8;
}
uint64_t data = 0;
mm.getBytes(addr, width, &data);
ext.set_data(data);