Merge commit 'dcd2c021a5ac91d38187d397914e5f51e2fc8819'

Conflicts:
	tools/import-trace/RegisterImporter.cc

Change-Id: I4f49c976bd60badba73c15746aa03c420cb9f77b

src/core/sal/Architecture.hpp

@@ -0,0 +1,15 @@
+// Architecture.hpp: wraps architecture definition headers
+#ifndef __ARCHITECTURE_HPP__
+  #define __ARCHITECTURE_HPP__
+
+#include "config/FailConfig.hpp"
+
+#ifdef BUILD_X86
+#include "x86/X86Architecture.hpp"
+#endif
+
+#ifdef BUILD_ARM
+#include "arm/ARMArchitecture.hpp"
+#endif
+
+#endif

src/core/sal/CPU.cc

@@ -22,6 +22,7 @@ void CPUArchitecture::m_addRegister(Register* reg, RegisterType type)
 Register* CPUArchitecture::getRegister(size_t i) const
 {
 	assert(i < m_Registers.size() && "FATAL ERROR: Invalid index provided!");
+	assert(m_Registers[i]->getId() == i && "FATAL ERROR: Register index mismatch");
 	return m_Registers[i];
 }
 

src/core/sal/CPU.hpp

@@ -13,7 +13,7 @@ namespace fail {
 /**
  * \class CPUArchitecture
  * This is the base class for CPU architectures that can be used to merge information and
- * functionallity that every backend with the same target architecture will share. The classes
+ * functionality that every backend with the same target architecture will share.  The classes
  * directly derived from this are especially meant to be usable in campaigns, so they shouldn't
  * contain any backend specific code.
  */

src/core/sal/Register.hpp

@@ -102,7 +102,7 @@ public:
 	 */
 	iterator begin() { return m_Regs.begin(); }
 	/**
-	 * Returns an iterator to the end of the interal data structure.
+	 * Returns an iterator to the end of the internal data structure.
 	 * \code
 	 * [1|2| ... |n]X
 	 *              ^

src/core/sal/arm/ArmArchitecture.hpp

@@ -17,6 +17,10 @@ public:
 	~ArmArchitecture();
 };
 
+#ifdef BUILD_ARM
+typedef ArmArchitecture Architecture;
+#endif
+
 /**
  * \enum GPRegIndex
  * Defines the general purpose (GP) register identifier for the ARM

src/core/sal/x86/X86Architecture.hpp

@@ -18,6 +18,10 @@ public:
 	~X86Architecture();
 };
 
+#ifdef BUILD_X86
+typedef X86Architecture Architecture;
+#endif
+
 /**
  * \enum GPRegisterId
  * Symbolic identifier to access the x86 general purpose register

src/core/util/Database.cc

@@ -8,7 +8,15 @@ static fail::Logger LOG("Database", true);
 
 using namespace fail;
 
+#ifndef __puma
+boost::mutex Database::m_global_lock;
+#endif
+
 Database::Database(const std::string &username, const std::string &host, const std::string &database) {
+#ifndef __puma
+	boost::lock_guard<boost::mutex> guard(m_global_lock);
+#endif
+
 	handle = mysql_init(0);
 	last_result = 0;
 	mysql_options(handle, MYSQL_READ_DEFAULT_FILE, "~/.my.cnf");
@@ -26,6 +34,9 @@ Database::~Database()
 	// flush cached INSERTs if available
 	insert_multiple();
 
+#ifndef __puma
+	boost::lock_guard<boost::mutex> guard(m_global_lock);
+#endif
 	mysql_close(handle);
 }
 
@@ -217,7 +228,7 @@ void Database::cmdline_setup() {
 	HOSTNAME	  = cmd.addOption("H", "hostname", Arg::Required,
 								  "-h/--hostname \tMYSQL Hostname (default: taken from ~/.my.cnf)");
 	USERNAME	  = cmd.addOption("u", "username", Arg::Required,
-								  "-u/--username \tMYSQL Username (default: taken from ~/.my.cnf, or your current user)");
+								  "-u/--username \tMYSQL Username (default: taken from ~/.my.cnf, or your current user)\n");
 }
 
 Database * Database::cmdline_connect() {

src/core/util/Database.hpp

@@ -23,6 +23,7 @@ namespace fail {
 		MYSQL_RES *last_result; // !< Used for mysql_result_free
 #ifndef __puma
 		boost::mutex m_handle_lock;
+		static boost::mutex m_global_lock;
 #endif
 		std::string m_insertquery;
 		std::vector<std::string> m_insertquery_values;

src/core/util/llvmdisassembler/LLVMDisassembler.cpp

@@ -105,6 +105,7 @@ void LLVMDisassembler::disassemble()
 					instr_info.opcode = Inst.getOpcode();
 					instr_info.length = Size;
 					instr_info.address = SectionAddr + Index;
+					instr_info.conditional_branch = desc.isConditionalBranch();
 
 					unsigned int  pos = 0;
 					for (MCInst::iterator it = Inst.begin(); it != Inst.end(); ++it) {

src/core/util/llvmdisassembler/LLVMDisassembler.hpp

@@ -42,6 +42,7 @@ public:
 		unsigned int opcode;
 		unsigned int address;
 		unsigned char length;
+		bool conditional_branch;
 		std::vector<register_t> reg_uses;
 		std::vector<register_t> reg_defs;
 	};

src/core/util/llvmdisassembler/testing/llvmDisTest.cc

@@ -62,6 +62,10 @@ int main(int argc, char* argv[]) {
 			 it != instr.reg_defs.end(); ++it) {
 			std::cout << reg_info.getName(*it) << "(" << *it << ") ";
 		}
+
+		if (instr.conditional_branch) {
+			std::cout << "(conditional branch)";
+		}
 		std::cout << std::endl;
 	}
 }