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Additionally passing the current Bochs CPU context and instruction cache entry to BochsController (enables detailed instruction analysis and modification)

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git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1361 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
This commit is contained in:
unzner
2012-06-15 16:39:14 +00:00
parent 33772f750e
commit bff60aeae3
12 changed files with 702 additions and 251 deletions
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22
src/experiments/l4-sys/l4sys.proto
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@ -1,7 +1,15 @@
message L4SysProtoMsg {
// experiment types
enum ExperimentType {
GPRFLIP = 10;
RATFLIP = 15;
IDCFLIP = 20;
ALUINSTR = 30;
}
// parameters
required int32 instr_offset = 1;
required int32 bit_offset = 2;
required ExperimentType exp_type = 10;
required int32 instr_offset = 20;
required int32 bit_offset = 30;
// results
// make these optional to reduce overhead for server->client communication
@ -14,13 +22,13 @@ message L4SysProtoMsg {
UNKNOWN = 6;
}
// instruction pointer where injection was done
optional uint32 injection_ip = 3;
optional uint32 injection_ip = 40;
// result type, see above
optional ResultType resulttype = 4;
optional ResultType resulttype = 50;
// result data, depending on resulttype (see source code)
optional uint32 resultdata = 5;
optional uint32 resultdata = 60;
// generated output
optional string output = 6;
optional string output = 70;
// optional textual description of what happened
optional string details = 7;
optional string details = 80;
}