core/sal: comment typos
Change-Id: I9ac66d7d1afa22dc6645433736e1c1d38a4e23fa
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@ -29,17 +29,17 @@ typedef X86Architecture Architecture;
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* in case the activated simulator has 64 bit ability.
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* in case the activated simulator has 64 bit ability.
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*/
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*/
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enum GPRegisterId {
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enum GPRegisterId {
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#ifdef SIM_SUPPORT_64 // 64 bit register id's:
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#ifdef SIM_SUPPORT_64 // 64 bit register IDs:
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RID_RAX = 0, RID_RCX, RID_RDX, RID_RBX, RID_RSP, RID_RBP, RID_RSI, RID_RDI,
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RID_RAX = 0, RID_RCX, RID_RDX, RID_RBX, RID_RSP, RID_RBP, RID_RSI, RID_RDI,
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RID_R8, RID_R9, RID_R10, RID_R11, RID_R12, RID_R13, RID_R14, RID_R15,
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RID_R8, RID_R9, RID_R10, RID_R11, RID_R12, RID_R13, RID_R14, RID_R15,
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#else // 32 bit register id's:
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#else // 32 bit register IDs:
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RID_EAX = 0, RID_ECX, RID_EDX, RID_EBX, RID_ESP, RID_EBP, RID_ESI, RID_EDI,
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RID_EAX = 0, RID_ECX, RID_EDX, RID_EBX, RID_ESP, RID_EBP, RID_ESI, RID_EDI,
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// skip a few IDs to get identical numbers for special-purpose registers in
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// skip a few IDs to get identical numbers for special-purpose registers in
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// 32 and 64 bit setups:
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// 32 and 64 bit setups:
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SKIP_64BIT_IDS = 15,
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SKIP_64BIT_IDS = 15,
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#endif
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#endif
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RID_LAST_GP_ID,
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RID_LAST_GP_ID,
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// common register id's (independent of the current register width):
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// common register IDs (independent of the current register width):
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RID_CAX = 0, RID_CCX, RID_CDX, RID_CBX, RID_CSP, RID_CBP, RID_CSI, RID_CDI
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RID_CAX = 0, RID_CCX, RID_CDX, RID_CBX, RID_CSP, RID_CBP, RID_CSI, RID_CDI
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};
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};
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