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gem5: campaigns are now running without interruption

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This change introduces a fake iobus device into gem5 to prevent
it from crashing on bogus I/O memory accesses.

Change-Id: Ie69e3191bdd917cc681269852937a5a3820a93fb
This commit is contained in:
Richard Hellwig
2014-03-17 11:33:55 +01:00
committed by Michael Lenz
parent ea34860bd8
commit b60e1c0c66
8 changed files with 162 additions and 3 deletions
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13
simulators/gem5/src/cpu/simple/atomic.cc
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@ -49,6 +49,7 @@
#include "cpu/exetrace.hh"
#include "debug/ExecFaulting.hh"
#include "debug/SimpleCPU.hh"
#include "debug/Fail.hh" //DanceOS
#include "mem/packet.hh"
#include "mem/packet_access.hh"
#include "mem/physical.hh"
@ -289,7 +290,11 @@ AtomicSimpleCPU::readMem(Addr addr, uint8_t * data,
}
dcache_access = true;
assert(!pkt.isError());
//DanceOS
//assert(!pkt.isError());
if(pkt.isError()) {
DPRINTF(Fail, "[FAIL] cpu/simple/atomic.cc readMem(): assert(!pkt.isError()) bypassed\n");
}
// DanceOS
#ifdef CONFIG_EVENT_MEMREAD
@ -397,7 +402,11 @@ AtomicSimpleCPU::writeMem(uint8_t *data, unsigned size,
}
dcache_access = true;
assert(!pkt.isError());
//DanceOS
//assert(!pkt.isError());
if(pkt.isError()) {
DPRINTF(Fail, "[FAIL] cpu/simple/atomic.cc writeMem(): assert(!pkt.isError()) bypassed\n");
}
// DanceOS
#ifdef CONFIG_EVENT_MEMWRITE