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Adding gem5 source to svn.

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git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1819 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
This commit is contained in:
friemel
2012-10-24 19:18:57 +00:00
parent f7ff71bd46
commit b41eec3f65
3222 changed files with 658579 additions and 1 deletions
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53
simulators/gem5/util/m5/Makefile.alpha Normal file
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# Copyright (c) 2005-2006 The Regents of The University of Michigan
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Nathan Binkert
# Ali Saidi
### If we are not compiling on an alpha, we must use cross tools ###
ifneq ($(shell uname -m), alpha)
CROSS_COMPILE?=alpha-unknown-linux-gnu-
endif
CC=$(CROSS_COMPILE)gcc
AS=$(CROSS_COMPILE)as
LD=$(CROSS_COMPILE)ld
CFLAGS=-O2
OBJS=m5.o m5op_alpha.o
all: m5
%.o: %.S
$(CC) $(CFLAGS) -o $@ -c $<
%.o: %.c
$(CC) $(CFLAGS) -o $@ -c $<
m5: $(OBJS)
$(CC) -o $@ $(OBJS)
clean:
rm -f *.o m5

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simulators/gem5/util/m5/Makefile.arm Normal file
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# Copyright (c) 2010 ARM Limited
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
# not be construed as granting a license to any other intellectual
# property including but not limited to intellectual property relating
# to a hardware implementation of the functionality of the software
# licensed hereunder. You may use the software subject to the license
# terms below provided that you ensure that this notice is replicated
# unmodified and in its entirety in all distributions of the software,
# modified or unmodified, in source code or in binary form.
#
# Copyright (c) 2005-2006 The Regents of The University of Michigan
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Nathan Binkert
# Ali Saidi
### If we are not compiling on an arm, we must use cross tools ###
ifneq ($(shell uname -m), arm)
CROSS_COMPILE?=arm-none-linux-gnueabi-
endif
CC=$(CROSS_COMPILE)gcc
AS=$(CROSS_COMPILE)as
LD=$(CROSS_COMPILE)ld
JC=javac
JH=javah
JR=jar
### JDK_PATH must be set to build gem5OpJni
#JDK_PATH=/path/to/jdk/version_number
CFLAGS=-O2 -I $(JDK_PATH)/include/ -I $(JDK_PATH)/include/linux
OBJS=m5.o m5op_arm.o
JNI_OBJS=m5op_arm.o jni_gem5Op.o
all: m5
%.o: %.S
$(CC) $(CFLAGS) -o $@ -c $<
%.o: %.c
$(CC) $(CFLAGS) -o $@ -c $<
m5: $(OBJS)
$(CC) -o $@ $(OBJS)
gem5OpJni: gem5OpJni.jar $(JNI_OBJS)
$(CC) --shared -o lib$@.so $(JNI_OBJS)
gem5OpJni.jar:
$(JC) jni/gem5Op.java; \
$(JH) jni.gem5Op; \
$(JR) cvf $@ jni/*.class
clean:
rm -f *.o m5 libgemOpJni.so gem5OpJni.jar jni/*.class

53
simulators/gem5/util/m5/Makefile.sparc Normal file
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# Copyright (c) 2005-2006 The Regents of The University of Michigan
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Nathan Binkert
# Ali Saidi
### If we are not compiling on an alpha, we must use cross tools ###
ifneq ($(shell uname -m), sun4v)
CROSS_COMPILE?=sparc64-sun-solaris2.10-
endif
CC=$(CROSS_COMPILE)gcc
AS=$(CROSS_COMPILE)as
LD=$(CROSS_COMPILE)ld
CFLAGS=-O2 -m64
OBJS=m5.o m5op_sparc.o
all: m5
%.o: %.S
$(CC) $(CFLAGS) -o $@ -c $<
%.o: %.c
$(CC) $(CFLAGS) -o $@ -c $<
m5: $(OBJS)
$(CC) -m64 -o $@ $(OBJS)
clean:
rm -f *.o m5

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simulators/gem5/util/m5/Makefile.thumb Normal file
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# Copyright (c) 2010 ARM Limited
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
# not be construed as granting a license to any other intellectual
# property including but not limited to intellectual property relating
# to a hardware implementation of the functionality of the software
# licensed hereunder. You may use the software subject to the license
# terms below provided that you ensure that this notice is replicated
# unmodified and in its entirety in all distributions of the software,
# modified or unmodified, in source code or in binary form.
#
# Copyright (c) 2005-2006 The Regents of The University of Michigan
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Nathan Binkert
# Ali Saidi
# Chander Sudanthi
### If we are not compiling on an arm, we must use cross tools ###
ifneq ($(shell uname -m), arm)
CROSS_COMPILE?=arm-none-linux-gnueabi-
endif
CC=$(CROSS_COMPILE)gcc
AS=$(CROSS_COMPILE)as
LD=$(CROSS_COMPILE)ld
#CFLAGS=-O2 -march=armv7 -mthumb
CFLAGS=-O2 -mthumb
OBJS=m5.o m5op_arm.o
all: m5
%.o: %.S
$(CC) $(CFLAGS) -o $@ -c $<
%.o: %.c
$(CC) $(CFLAGS) -o $@ -c $<
m5: $(OBJS)
$(CC) -o $@ -march=armv7 -mthumb $(OBJS)
clean:
rm -f *.o m5

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simulators/gem5/util/m5/Makefile.x86 Normal file
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# Copyright (c) 2005-2006 The Regents of The University of Michigan
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Nathan Binkert
# Ali Saidi
CC=gcc
AS=as
LD=ld
CFLAGS=-O2
OBJS=m5.o m5op_x86.o
all: m5
%.o: %.S
$(CC) $(CFLAGS) -o $@ -c $<
%.o: %.c
$(CC) $(CFLAGS) -o $@ -c $<
m5: $(OBJS)
$(CC) -o $@ $(OBJS)
clean:
rm -f *.o m5

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simulators/gem5/util/m5/jni/gem5Op.java Normal file
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/*
* Copyright (c) 2010 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
* not be construed as granting a license to any other intellectual
* property including but not limited to intellectual property relating
* to a hardware implementation of the functionality of the software
* licensed hereunder. You may use the software subject to the license
* terms below provided that you ensure that this notice is replicated
* unmodified and in its entirety in all distributions of the software,
* modified or unmodified, in source code or in binary form.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Prakash Ramrakhyani
*/
package jni;
/**
* Java class to implement JNI for m5Ops
*/
public class gem5Op {
public native void arm(long address);
public native void quiesce();
public native void quiesceNs(long ns);
public native void quiesceCycle(long cycles);
public native long quiesceTime();
public native long rpns();
public native void wakeCPU(long cpuid);
public native void exit(long ns_delay);
public native long initparam();
public native void checkpoint(long ns_delay, long ns_period);
public native void reset_stats(long ns_delay, long ns_period);
public native void dump_stats(long ns_delay, long ns_period);
public native void dumpreset_stats(long ns_delay, long ns_period);
public native void debugbreak();
public native void switchcpu();
public native void panic();
public native void work_begin(long workid, long threadid);
public native void work_end(long workid, long threadid);
}

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simulators/gem5/util/m5/jni_gem5Op.c Normal file
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/*
* Copyright (c) 2010 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
* not be construed as granting a license to any other intellectual
* property including but not limited to intellectual property relating
* to a hardware implementation of the functionality of the software
* licensed hereunder. You may use the software subject to the license
* terms below provided that you ensure that this notice is replicated
* unmodified and in its entirety in all distributions of the software,
* modified or unmodified, in source code or in binary form.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Prakash Ramrakhyani
*/
#include <stdint.h>
#include "jni_gem5Op.h"
#include "m5op.h"
/**
C library interface for gem5Op JNI
*/
JNIEXPORT void JNICALL
Java_jni_gem5Op_arm(JNIEnv *env, jobject obj, jlong j_address)
{
arm(j_address);
}
JNIEXPORT void JNICALL
Java_jni_gem5Op_quiesce(JNIEnv *env, jobject obj)
{
quiesce();
}
JNIEXPORT void JNICALL
Java_jni_gem5Op_quiesceNs(JNIEnv *env, jobject obj, jlong j_ns)
{
quiesceNs(j_ns);
}
JNIEXPORT void JNICALL
Java_jni_gem5Op_quiesceCycle(JNIEnv *env, jobject obj, jlong j_cycles)
{
quiesceCycle(j_cycles);
}
JNIEXPORT jlong JNICALL
Java_jni_gem5Op_quiesceTime(JNIEnv *env, jobject obj)
{
uint64_t time = quiesceTime();
if (time & 0x8000000000000000ULL)
printf("Truncated return value from quiesceTime() to 63 bits\n");
return (time & 0x7FFFFFFFFFFFFFFFULL);
}
JNIEXPORT jlong JNICALL
Java_jni_gem5Op_rpns(JNIEnv *env, jobject obj)
{
uint64_t time = rpns();
if (time & 0x8000000000000000ULL)
printf("Truncated return value from rpns() to 63 bits\n");
return (time & 0x7FFFFFFFFFFFFFFFULL);
}
JNIEXPORT void JNICALL
Java_jni_gem5Op_wakeCPU(JNIEnv *env, jobject obj, jlong j_cpuid)
{
wakeCPU(j_cpuid);
}
JNIEXPORT void JNICALL
Java_jni_gem5Op_exit(JNIEnv *env, jobject obj, jlong j_ns_delay)
{
m5_exit(j_ns_delay);
}
JNIEXPORT jlong JNICALL
Java_jni_gem5Op_initparam(JNIEnv *env, jobject obj)
{
uint64_t param = m5_initparam();
if (param & 0x8000000000000000ULL)
printf("Truncated return value from m_initparam() to 63 bits\n");
return (param & 0x7FFFFFFFFFFFFFFFULL);
}
JNIEXPORT void JNICALL
Java_jni_gem5Op_checkpoint(JNIEnv *env, jobject obj,
jlong j_ns_delay, jlong j_ns_period)
{
m5_checkpoint(j_ns_delay, j_ns_period);
}
JNIEXPORT void JNICALL
Java_jni_gem5Op_reset_1stats(JNIEnv *env, jobject obj,
jlong j_ns_delay, jlong j_ns_period)
{
m5_reset_stats(j_ns_delay, j_ns_period);
}
JNIEXPORT void JNICALL
Java_jni_gem5Op_dump_1stats(JNIEnv *env, jobject obj,
jlong j_ns_delay, jlong j_ns_period)
{
m5_dump_stats(j_ns_delay, j_ns_period);
}
JNIEXPORT void JNICALL
Java_jni_gem5Op_dumpreset_1stats(JNIEnv *env, jobject obj,
jlong j_ns_delay, jlong j_ns_period)
{
m5_dumpreset_stats(j_ns_delay, j_ns_period);
}
JNIEXPORT void JNICALL
Java_jni_gem5Op_debugbreak(JNIEnv *env, jobject obj)
{
m5_debugbreak();
}
JNIEXPORT void JNICALL
Java_jni_gem5Op_switchcpu (JNIEnv *env, jobject obj)
{
m5_switchcpu();
}
JNIEXPORT void JNICALL
Java_jni_gem5Op_panic(JNIEnv *env, jobject obj)
{
m5_panic();
}
JNIEXPORT void JNICALL
Java_jni_gem5Op_work_1begin(JNIEnv *env, jobject obj,
jlong j_workid, jlong j_threadid)
{
m5_work_begin(j_workid, j_threadid);
}
JNIEXPORT void JNICALL
Java_jni_gem5Op_work_1end(JNIEnv *env, jobject obj,
jlong j_workid, jlong j_threadid)
{
m5_work_end(j_workid, j_threadid);
}

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/*
* Copyright (c) 2011 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
* not be construed as granting a license to any other intellectual
* property including but not limited to intellectual property relating
* to a hardware implementation of the functionality of the software
* licensed hereunder. You may use the software subject to the license
* terms below provided that you ensure that this notice is replicated
* unmodified and in its entirety in all distributions of the software,
* modified or unmodified, in source code or in binary form.
*
* Copyright (c) 2003-2005 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Nathan Binkert
*/
#ifdef linux
#define _GNU_SOURCE
#include <sched.h>
#endif
#include <err.h>
#include <fcntl.h>
#include <inttypes.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include "m5op.h"
char *progname;
char *command = "unspecified";
void usage();
void
parse_int_args(int argc, char *argv[], uint64_t ints[], int len)
{
if (argc > len)
usage();
int i;
for (i = 0; i < len; ++i)
ints[i] = (i < argc) ? strtoul(argv[i], NULL, 0) : 0;
}
int
read_file(int dest_fid)
{
char buf[256*1024];
int offset = 0;
int len;
// Touch all buffer pages to ensure they are mapped in the
// page table. This is required in the case of X86_FS, where
// Linux does demand paging.
memset(buf, 0, sizeof(buf));
while ((len = m5_readfile(buf, sizeof(buf), offset)) > 0) {
write(dest_fid, buf, len);
offset += len;
}
}
int
write_file(const char *filename)
{
fprintf(stderr, "opening %s\n", filename);
int src_fid = open(filename, O_RDONLY);
if (src_fid < 0) {
fprintf(stderr, "error opening %s\n", filename);
return;
}
char buf[256*1024];
int offset = 0;
int len;
int bytes = 0;
memset(buf, 0, sizeof(buf));
while ((len = read(src_fid, buf, sizeof(buf))) > 0) {
bytes += m5_writefile(buf, len, offset, filename);
offset += len;
}
fprintf(stderr, "written %d bytes\n", bytes);
close(src_fid);
}
void
do_exit(int argc, char *argv[])
{
if (argc > 1)
usage();
m5_exit((argc > 0) ? strtoul(argv[0], NULL, 0) : 0);
}
void
do_reset_stats(int argc, char *argv[])
{
uint64_t ints[2];
parse_int_args(argc, argv, ints, 2);
m5_reset_stats(ints[0], ints[1]);
}
void
do_dump_stats(int argc, char *argv[])
{
uint64_t ints[2];
parse_int_args(argc, argv, ints, 2);
m5_dump_stats(ints[0], ints[1]);
}
void
do_dump_reset_stats(int argc, char *argv[])
{
uint64_t ints[2];
parse_int_args(argc, argv, ints, 2);
m5_dumpreset_stats(ints[0], ints[1]);
}
void
do_read_file(int argc, char *argv[])
{
if (argc > 0)
usage();
read_file(STDOUT_FILENO);
}
void
do_write_file(int argc, char *argv[])
{
if (argc != 1)
usage();
const char *filename = argv[0];
write_file(filename);
}
void
do_exec_file(int argc, char *argv[])
{
if (argc > 0)
usage();
const char *destname = "/tmp/execfile";
int fid = open(destname, O_WRONLY, 0777);
int len = read_file(fid);
close(fid);
if (len > 0) {
execl(destname, "execfile", NULL);
err(1, "execl failed!");
}
}
void
do_checkpoint(int argc, char *argv[])
{
uint64_t ints[2];
parse_int_args(argc, argv, ints, 2);
m5_checkpoint(ints[0], ints[1]);
}
void
do_load_symbol(int argc, char *argv[])
{
if (argc != 2)
usage();
uint64_t addr = strtoul(argv[0], NULL, 0);
char *symbol = argv[1];
m5_loadsymbol(addr, symbol);
}
void
do_initparam(int argc, char *argv[])
{
if (argc != 0)
usage();
uint64_t val = m5_initparam();
printf("%"PRIu64, val);
}
void
do_sw99param(int argc, char *argv[])
{
if (argc != 0)
usage();
uint64_t param = m5_initparam();
// run-time, rampup-time, rampdown-time, warmup-time, connections
printf("%d %d %d %d %d", (param >> 48) & 0xfff,
(param >> 36) & 0xfff, (param >> 24) & 0xfff,
(param >> 12) & 0xfff, (param >> 0) & 0xfff);
}
#ifdef linux
void
do_pin(int argc, char *argv[])
{
if (argc < 2)
usage();
cpu_set_t mask;
CPU_ZERO(&mask);
const char *sep = ",";
char *target = strtok(argv[0], sep);
while (target) {
CPU_SET(atoi(target), &mask);
target = strtok(NULL, sep);
}
if (sched_setaffinity(0, sizeof(cpu_set_t), &mask) < 0)
err(1, "setaffinity");
execvp(argv[1], &argv[1]);
err(1, "execvp failed!");
}
#endif
struct MainFunc
{
char *name;
void (*func)(int argc, char *argv[]);
char *usage;
};
struct MainFunc mainfuncs[] = {
{ "exit", do_exit, "[delay]" },
{ "resetstats", do_reset_stats, "[delay [period]]" },
{ "dumpstats", do_dump_stats, "[delay [period]]" },
{ "dumpresetstats", do_dump_reset_stats, "[delay [period]]" },
{ "readfile", do_read_file, "" },
{ "writefile", do_write_file, "<filename>" },
{ "execfile", do_exec_file, "" },
{ "checkpoint", do_checkpoint, "[delay [period]]" },
{ "loadsymbol", do_load_symbol, "<address> <symbol>" },
{ "initparam", do_initparam, "" },
{ "sw99param", do_sw99param, "" },
#ifdef linux
{ "pin", do_pin, "<cpu> <program> [args ...]" }
#endif
};
int numfuncs = sizeof(mainfuncs) / sizeof(mainfuncs[0]);
void
usage()
{
int i;
for (i = 0; i < numfuncs; ++i) {
char *header = i ? "" : "usage:";
fprintf(stderr, "%-6s %s %s %s\n",
header, progname, mainfuncs[i].name, mainfuncs[i].usage);
}
fprintf(stderr, "\n");
fprintf(stderr, "All times in nanoseconds!\n");
exit(1);
}
int
main(int argc, char *argv[])
{
progname = argv[0];
if (argc < 2)
usage(1);
command = argv[1];
argv += 2;
argc -= 2;
int i;
for (i = 0; i < numfuncs; ++i) {
if (strcmp(command, mainfuncs[i].name) != 0)
continue;
mainfuncs[i].func(argc, argv);
exit(0);
}
usage(1);
}

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/*
* Copyright (c) 2003-2006 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Nathan Binkert
* Ali Saidi
*/
#ifndef __M5OP_H__
#define __M5OP_H__
#include <stdint.h>
void arm(uint64_t address);
void quiesce(void);
void quiesceNs(uint64_t ns);
void quiesceCycle(uint64_t cycles);
uint64_t quiesceTime(void);
uint64_t rpns();
void wakeCPU(uint64_t cpuid);
void m5_exit(uint64_t ns_delay);
uint64_t m5_initparam(void);
void m5_checkpoint(uint64_t ns_delay, uint64_t ns_period);
void m5_reset_stats(uint64_t ns_delay, uint64_t ns_period);
void m5_dump_stats(uint64_t ns_delay, uint64_t ns_period);
void m5_dumpreset_stats(uint64_t ns_delay, uint64_t ns_period);
uint64_t m5_readfile(void *buffer, uint64_t len, uint64_t offset);
uint64_t m5_writefile(void *buffer, uint64_t len, uint64_t offset, const char *filename);
void m5_debugbreak(void);
void m5_switchcpu(void);
void m5_addsymbol(uint64_t addr, char *symbol);
void m5_panic(void);
void m5_work_begin(uint64_t workid, uint64_t threadid);
void m5_work_end(uint64_t workid, uint64_t threadid);
// These operations are for critical path annotation
void m5a_bsm(char *sm, const void *id, int flags);
void m5a_esm(char *sm);
void m5a_begin(int flags, char *st);
void m5a_end(void);
void m5a_q(const void *id, char *q, int count);
void m5a_dq(const void *id, char *q, int count);
void m5a_wf(const void *id, char *q, char *sm, int count);
void m5a_we(const void *id, char *q, char *sm, int count);
void m5a_ws(const void *id, char *q, char *sm);
void m5a_sq(const void *id, char *q, int count, int flags);
void m5a_aq(const void *id, char *q, int count);
void m5a_pq(const void *id, char *q, int count);
void m5a_l(char *lsm, const void *id, char *sm);
void m5a_identify(uint64_t id);
uint64_t m5a_getid(void);
#define M5_AN_FL_NONE 0x0
#define M5_AN_FL_BAD 0x2
#define M5_AN_FL_LINK 0x10
#define M5_AN_FL_RESET 0x20
#endif // __M5OP_H__

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/*
* Copyright (c) 2003-2006 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Nathan Binkert
* Ali Saidi
*/
#define m5_op 0x01
#include "m5ops.h"
#define INST(op, ra, rb, func) \
.long (((op) << 26) | ((ra) << 21) | ((rb) << 16) | (func))
#define LEAF(func) \
.align 3; \
.globl func; \
.ent func; \
func:
#define RET \
ret ($26)
#define END(func) \
.end func
#define SIMPLE_OP(_f, _o) \
LEAF(_f) \
_o; \
RET; \
END(_f)
#define ARM(reg) INST(m5_op, reg, 0, arm_func)
#define QUIESCE INST(m5_op, 0, 0, quiesce_func)
#define QUIESCENS(r1) INST(m5_op, r1, 0, quiescens_func)
#define QUIESCECYC(r1) INST(m5_op, r1, 0, quiescecycle_func)
#define QUIESCETIME INST(m5_op, 0, 0, quiescetime_func)
#define RPNS INST(m5_op, 0, 0, rpns_func)
#define WAKE_CPU(r1) INST(m5_op, r1, 0, wakecpu_func)
#define M5EXIT(reg) INST(m5_op, reg, 0, exit_func)
#define INITPARAM(reg) INST(m5_op, reg, 0, initparam_func)
#define LOADSYMBOL(reg) INST(m5_op, reg, 0, loadsymbol_func)
#define RESET_STATS(r1, r2) INST(m5_op, r1, r2, resetstats_func)
#define DUMP_STATS(r1, r2) INST(m5_op, r1, r2, dumpstats_func)
#define DUMPRST_STATS(r1, r2) INST(m5_op, r1, r2, dumprststats_func)
#define CHECKPOINT(r1, r2) INST(m5_op, r1, r2, ckpt_func)
#define READFILE INST(m5_op, 0, 0, readfile_func)
#define DEBUGBREAK INST(m5_op, 0, 0, debugbreak_func)
#define SWITCHCPU INST(m5_op, 0, 0, switchcpu_func)
#define ADDSYMBOL(r1,r2) INST(m5_op, r1, r2, addsymbol_func)
#define PANIC INST(m5_op, 0, 0, panic_func)
#define AN_BSM INST(m5_op, an_bsm, 0, annotate_func)
#define AN_ESM INST(m5_op, an_esm, 0, annotate_func)
#define AN_BEGIN INST(m5_op, an_begin, 0, annotate_func)
#define AN_END INST(m5_op, an_end, 0, annotate_func)
#define AN_Q INST(m5_op, an_q, 0, annotate_func)
#define AN_RQ INST(m5_op, an_rq, 0, annotate_func)
#define AN_DQ INST(m5_op, an_dq, 0, annotate_func)
#define AN_WF INST(m5_op, an_wf, 0, annotate_func)
#define AN_WE INST(m5_op, an_we, 0, annotate_func)
#define AN_WS INST(m5_op, an_ws, 0, annotate_func)
#define AN_SQ INST(m5_op, an_sq, 0, annotate_func)
#define AN_AQ INST(m5_op, an_aq, 0, annotate_func)
#define AN_PQ INST(m5_op, an_pq, 0, annotate_func)
#define AN_L INST(m5_op, an_l, 0, annotate_func)
#define AN_IDENTIFY INST(m5_op, an_identify, 0, annotate_func)
#define AN_GETID INST(m5_op, an_getid, 0, annotate_func)
.set noreorder
SIMPLE_OP(arm, ARM(16))
SIMPLE_OP(quiesce, QUIESCE)
SIMPLE_OP(quiesceNs, QUIESCENS(16))
SIMPLE_OP(quiesceCycle, QUIESCECYC(16))
SIMPLE_OP(quiesceTime, QUIESCETIME)
SIMPLE_OP(rpns, RPNS)
SIMPLE_OP(wakeCPU, WAKE_CPU(16))
SIMPLE_OP(m5_exit, M5EXIT(16))
SIMPLE_OP(m5_initparam, INITPARAM(0))
SIMPLE_OP(m5_loadsymbol, LOADSYMBOL(0))
SIMPLE_OP(m5_reset_stats, RESET_STATS(16, 17))
SIMPLE_OP(m5_dump_stats, DUMP_STATS(16, 17))
SIMPLE_OP(m5_dumpreset_stats, DUMPRST_STATS(16, 17))
SIMPLE_OP(m5_checkpoint, CHECKPOINT(16, 17))
SIMPLE_OP(m5_readfile, READFILE)
SIMPLE_OP(m5_debugbreak, DEBUGBREAK)
SIMPLE_OP(m5_switchcpu, SWITCHCPU)
SIMPLE_OP(m5_addsymbol, ADDSYMBOL(16, 17))
SIMPLE_OP(m5_panic, PANIC)
SIMPLE_OP(m5a_bsm, AN_BSM)
SIMPLE_OP(m5a_esm, AN_ESM)
SIMPLE_OP(m5a_begin, AN_BEGIN)
SIMPLE_OP(m5a_end, AN_END)
SIMPLE_OP(m5a_q, AN_Q)
SIMPLE_OP(m5a_rq, AN_RQ)
SIMPLE_OP(m5a_dq, AN_DQ)
SIMPLE_OP(m5a_wf, AN_WF)
SIMPLE_OP(m5a_we, AN_WE)
SIMPLE_OP(m5a_ws, AN_WS)
SIMPLE_OP(m5a_sq, AN_SQ)
SIMPLE_OP(m5a_aq, AN_AQ)
SIMPLE_OP(m5a_pq, AN_PQ)
SIMPLE_OP(m5a_l, AN_L)
SIMPLE_OP(m5a_identify, AN_IDENTIFY)
SIMPLE_OP(m5a_getid, AN_GETID)

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/*
* Copyright (c) 2010 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
* not be construed as granting a license to any other intellectual
* property including but not limited to intellectual property relating
* to a hardware implementation of the functionality of the software
* licensed hereunder. You may use the software subject to the license
* terms below provided that you ensure that this notice is replicated
* unmodified and in its entirety in all distributions of the software,
* modified or unmodified, in source code or in binary form.
*
* Copyright (c) 2003-2006 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Nathan Binkert
* Ali Saidi
* Chander Sudanthi
*/
.syntax unified
#ifdef __thumb__
.thumb
#endif
#define m5_op 0xEE
#include "m5ops.h"
#ifdef __thumb__
#define INST(op, ra, rb, func) \
.short (((op) << 8) | (func)); \
.short (((ra) << 12) | (0x1 << 8) | (0x1 << 4) | (rb))
/* m5ops m5func */
/* ra coproc 1 op=1 rb */
#else
#define INST(op, ra, rb, func) \
.long (((op) << 24) | ((func) << 16) | ((ra) << 12) | (0x1 << 8) | (0x1 << 4) | (rb))
/* m5ops m5func ra coproc 1 op=1 rb */
#endif
#define LEAF(func) \
.globl func; \
func:
#define RET \
mov pc,lr
#define END(func) \
#define SIMPLE_OP(_f, _o) \
LEAF(_f) \
_o; \
RET; \
END(_f)
#define ARM INST(m5_op, 0, 0, arm_func)
#define QUIESCE INST(m5_op, 0, 0, quiesce_func)
#define QUIESCENS INST(m5_op, 0, 0, quiescens_func)
#define QUIESCECYC INST(m5_op, 0, 0, quiescecycle_func)
#define QUIESCETIME INST(m5_op, 0, 0, quiescetime_func)
#define RPNS INST(m5_op, 0, 0, rpns_func)
#define WAKE_CPU INST(m5_op, 0, 0, wakecpu_func)
#define M5EXIT INST(m5_op, 0, 0, exit_func)
#define INITPARAM INST(m5_op, 0, 0, initparam_func)
#define LOADSYMBOL INST(m5_op, 0, 0, loadsymbol_func)
#define RESET_STATS INST(m5_op, 0, 0, resetstats_func)
#define DUMP_STATS INST(m5_op, 0, 0, dumpstats_func)
#define DUMPRST_STATS INST(m5_op, 0, 0, dumprststats_func)
#define CHECKPOINT INST(m5_op, 0, 0, ckpt_func)
#define READFILE INST(m5_op, 0, 0, readfile_func)
#define WRITEFILE INST(m5_op, 0, 0, writefile_func)
#define DEBUGBREAK INST(m5_op, 0, 0, debugbreak_func)
#define SWITCHCPU INST(m5_op, 0, 0, switchcpu_func)
#define ADDSYMBOL INST(m5_op, 0, 0, addsymbol_func)
#define PANIC INST(m5_op, 0, 0, panic_func)
#define WORK_BEGIN INST(m5_op, 0, 0, work_begin_func)
#define WORK_END INST(m5_op, 0, 0, work_end_func)
#define AN_BSM INST(m5_op, an_bsm, 0, annotate_func)
#define AN_ESM INST(m5_op, an_esm, 0, annotate_func)
#define AN_BEGIN INST(m5_op, an_begin, 0, annotate_func)
#define AN_END INST(m5_op, an_end, 0, annotate_func)
#define AN_Q INST(m5_op, an_q, 0, annotate_func)
#define AN_RQ INST(m5_op, an_rq, 0, annotate_func)
#define AN_DQ INST(m5_op, an_dq, 0, annotate_func)
#define AN_WF INST(m5_op, an_wf, 0, annotate_func)
#define AN_WE INST(m5_op, an_we, 0, annotate_func)
#define AN_WS INST(m5_op, an_ws, 0, annotate_func)
#define AN_SQ INST(m5_op, an_sq, 0, annotate_func)
#define AN_AQ INST(m5_op, an_aq, 0, annotate_func)
#define AN_PQ INST(m5_op, an_pq, 0, annotate_func)
#define AN_L INST(m5_op, an_l, 0, annotate_func)
#define AN_IDENTIFY INST(m5_op, an_identify, 0, annotate_func)
#define AN_GETID INST(m5_op, an_getid, 0, annotate_func)
.text
SIMPLE_OP(arm, ARM)
SIMPLE_OP(quiesce, QUIESCE)
SIMPLE_OP(quiesceNs, QUIESCENS)
SIMPLE_OP(quiesceCycle, QUIESCECYC)
SIMPLE_OP(quiesceTime, QUIESCETIME)
SIMPLE_OP(rpns, RPNS)
SIMPLE_OP(wakeCPU, WAKE_CPU)
SIMPLE_OP(m5_exit, M5EXIT)
SIMPLE_OP(m5_initparam, INITPARAM)
SIMPLE_OP(m5_loadsymbol, LOADSYMBOL)
SIMPLE_OP(m5_reset_stats, RESET_STATS)
SIMPLE_OP(m5_dump_stats, DUMP_STATS)
SIMPLE_OP(m5_dumpreset_stats, DUMPRST_STATS)
SIMPLE_OP(m5_checkpoint, CHECKPOINT)
SIMPLE_OP(m5_readfile, READFILE)
SIMPLE_OP(m5_writefile, WRITEFILE)
SIMPLE_OP(m5_debugbreak, DEBUGBREAK)
SIMPLE_OP(m5_switchcpu, SWITCHCPU)
SIMPLE_OP(m5_addsymbol, ADDSYMBOL)
SIMPLE_OP(m5_panic, PANIC)
SIMPLE_OP(m5_work_begin, WORK_BEGIN)
SIMPLE_OP(m5_work_end, WORK_END)
SIMPLE_OP(m5a_bsm, AN_BSM)
SIMPLE_OP(m5a_esm, AN_ESM)
SIMPLE_OP(m5a_begin, AN_BEGIN)
SIMPLE_OP(m5a_end, AN_END)
SIMPLE_OP(m5a_q, AN_Q)
SIMPLE_OP(m5a_rq, AN_RQ)
SIMPLE_OP(m5a_dq, AN_DQ)
SIMPLE_OP(m5a_wf, AN_WF)
SIMPLE_OP(m5a_we, AN_WE)
SIMPLE_OP(m5a_ws, AN_WS)
SIMPLE_OP(m5a_sq, AN_SQ)
SIMPLE_OP(m5a_aq, AN_AQ)
SIMPLE_OP(m5a_pq, AN_PQ)
SIMPLE_OP(m5a_l, AN_L)
SIMPLE_OP(m5a_identify, AN_IDENTIFY)
SIMPLE_OP(m5a_getid, AN_GETID)

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/*
* Copyright (c) 2003-2006 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Nathan Binkert
* Ali Saidi
*/
#define m5_op 0x2
#define m5_op3 0x37
#include "m5ops.h"
#define INST(func, rs1, rs2, rd) \
.long (m5_op) << 30 | (rd) << 25 | (m5_op3) << 19 | (func) << 7 | \
(rs1) << 14 | (rs2) << 0;
#define LEAF(func) \
.section ".text"; \
.align 4; \
.global func; \
.type func, #function; \
func:
#define END(func) \
.size func, (.-func)
#define DEBUGBREAK INST(debugbreak_func, 0, 0, 0)
#define M5EXIT INST(exit_func, 0, 0, 0)
#define PANIC INST(panic_func, 0, 0, 0)
#define READFILE INST(readfile_func, 0, 0, 0)
LEAF(m5_exit)
retl
M5EXIT
END(m5_exit)
LEAF(m5_panic)
retl
PANIC
END(m5_panic)
LEAF(m5_readfile)
retl
READFILE
END(m5_readfile)
LEAF(m5_debugbreak)
retl
DEBUGBREAK
END(m5_debugbreak)
/* !!!!!! All code below here just panics !!!!!! */
LEAF(arm)
retl
PANIC
END(arm)
LEAF(quiesce)
retl
PANIC
END(quiesce)
LEAF(quiesceNs)
retl
PANIC
END(quiesceNs)
LEAF(quiesceCycle)
retl
PANIC
END(quiesceCycle)
LEAF(quiesceTime)
retl
PANIC
END(quiesceTime)
LEAF(m5_initparam)
retl
PANIC
END(m5_initparam)
LEAF(m5_loadsymbol)
retl
PANIC
END(m5_loadsymbol)
LEAF(m5_reset_stats)
retl
PANIC
END(m5_reset_stats)
LEAF(m5_dump_stats)
retl
PANIC
END(m5_dump_stats)
LEAF(m5_dumpreset_stats)
retl
PANIC
END(m5_dumpreset_stats)
LEAF(m5_checkpoint)
retl
PANIC
END(m5_checkpoint)
LEAF(m5_switchcpu)
retl
PANIC
END(m5_switchcpu)
LEAF(m5_addsymbol)
retl
PANIC
END(m5_addsymbol)
LEAF(m5_anbegin)
retl
PANIC
END(m5_anbegin)
LEAF(m5_anwait)
retl
PANIC
END(m5_anwait)

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/*
* Copyright (c) 2003-2006 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Gabe Black
* Nathan Binkert
* Ali Saidi
*/
#include "m5ops.h"
#define TWO_BYTE_OP(name, number) \
.globl name; \
.func name; \
name: \
.byte 0x0F, 0x04; \
.word number; \
ret; \
.endfunc;
TWO_BYTE_OP(arm, arm_func)
TWO_BYTE_OP(quiesce, quiesce_func)
TWO_BYTE_OP(quiesceNs, quiescens_func)
TWO_BYTE_OP(quiesceCycle, quiescecycle_func)
TWO_BYTE_OP(quiesceTime, quiescetime_func)
TWO_BYTE_OP(rpns, rpns_func)
TWO_BYTE_OP(m5_exit, exit_func)
TWO_BYTE_OP(m5_initparam, initparam_func)
TWO_BYTE_OP(m5_loadsymbol, loadsymbol_func)
TWO_BYTE_OP(m5_reset_stats, resetstats_func)
TWO_BYTE_OP(m5_dump_stats, dumpstats_func)
TWO_BYTE_OP(m5_dumpreset_stats, dumprststats_func)
TWO_BYTE_OP(m5_checkpoint, ckpt_func)
TWO_BYTE_OP(m5_readfile, readfile_func)
TWO_BYTE_OP(m5_debugbreak, debugbreak_func)
TWO_BYTE_OP(m5_switchcpu, switchcpu_func)
TWO_BYTE_OP(m5_addsymbol, addsymbol_func)
TWO_BYTE_OP(m5_panic, panic_func)
TWO_BYTE_OP(m5_work_begin, work_begin_func)
TWO_BYTE_OP(m5_work_end, work_end_func)

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@ -0,0 +1,82 @@
/*
* Copyright (c) 2003-2006 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Nathan Binkert
* Ali Saidi
*/
#define arm_func 0x00
#define quiesce_func 0x01
#define quiescens_func 0x02
#define quiescecycle_func 0x03
#define quiescetime_func 0x04
#define rpns_func 0x07
#define wakecpu_func 0x09
#define deprecated1_func 0x10 // obsolete ivlb
#define deprecated2_func 0x11 // obsolete ivle
#define deprecated3_func 0x20 // deprecated exit function
#define exit_func 0x21
#define initparam_func 0x30
#define loadsymbol_func 0x31
#define resetstats_func 0x40
#define dumpstats_func 0x41
#define dumprststats_func 0x42
#define ckpt_func 0x43
#define writefile_func 0x4F
#define readfile_func 0x50
#define debugbreak_func 0x51
#define switchcpu_func 0x52
#define addsymbol_func 0x53
#define panic_func 0x54
#define reserved2_func 0x56 // Reserved for user
#define reserved3_func 0x57 // Reserved for user
#define reserved4_func 0x58 // Reserved for user
#define reserved5_func 0x59 // Reserved for user
#define work_begin_func 0x5a
#define work_end_func 0x5b
// These operations are for critical path annotation
#define annotate_func 0x55
#define an_bsm 0x1
#define an_esm 0x2
#define an_begin 0x3
#define an_end 0x4
#define an_q 0x6
#define an_dq 0x7
#define an_wf 0x8
#define an_we 0x9
#define an_rq 0xA
#define an_ws 0xB
#define an_sq 0xC
#define an_aq 0xD
#define an_pq 0xE
#define an_l 0xF
#define an_identify 0x10
#define an_getid 0x11