Adding gem5 source to svn.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1819 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
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simulators/gem5/util/ccdrv/devtime.c
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197
simulators/gem5/util/ccdrv/devtime.c
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/*
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* Copyright (c) 2004 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Ali Saidi
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*/
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#include <asm/io.h>
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#include <asm/page.h>
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#include <asm/uaccess.h>
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#include <linux/config.h>
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#include <linux/fs.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/netdevice.h>
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#ifdef __i386__
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#include <asm/msr.h>
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#include <asm/processor.h>
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#endif
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#define DRIVER_AUTHOR "Ali Saidi"
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#define DRIVER_DESC "Interface to time uncacachable read and writes to device registers"
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#define DRIVER_VER "0.1"
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static char *dataAddr = NULL;
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static int count = 0;
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#ifdef __alpha__
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static int memTest = 0;
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#endif
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static inline uint32_t cycleCounter(uint32_t dep);
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static int __init devtime_start(void)
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{
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uint64_t addr;
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uint32_t t1, t2;
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uint32_t trash;
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int x;
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uint32_t *times;
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uint32_t num = 0;
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struct net_device *dev;
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printk("Devtime Driver Version %s Loaded...\n", DRIVER_VER);
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#ifdef __alpha__
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if (memTest) {
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addr = 0xfffffc0000000000;
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// addr += 16*1024*1024;
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printk("Preparing memory test.\n");
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t1 = cycleCounter(trash);
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for (x = 0; x < count; x++) {
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trash = readl(addr);
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t2 = cycleCounter(trash);
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times[num++] = t2 - t1;
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t1 = t2;
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addr += 4096;
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}
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printk("Measurements:\n");
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for (x = 0; x < count; x++) {
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printk("%d ", times[x]);
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if (((x + 1) % 10) == 0)
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printk("\n");
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}
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printk("\nDone.\n");
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} else
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#endif
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if (dataAddr != 0 && count != 0) {
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addr = simple_strtoull(dataAddr, NULL, 0);
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addr = ioremap(addr, PAGE_SIZE);
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/**
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* Make sure that the remapping actually worked. On alpha we have
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* linear addressing, so its not a problem. But it can fail in x86
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* if physical memory is mapped to this address.
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*/
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times = kmalloc(sizeof(uint32_t) * count, GFP_USER);
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if (!times) {
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printk("Could not allocate memory... Try again later.\n");
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return -1;
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}
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if (addr) {
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printk("Preparing to read %#llx %d times.\n", addr, count);
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t1 = cycleCounter(trash);
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for (x = 0; x < count; x++) {
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trash = readl(addr);
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t2 = cycleCounter(trash);
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times[num++] = t2 - t1;
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t1 = t2;
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}
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/**
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* Unmap the address.
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*/
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iounmap(addr);
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printk("Measurements:\n");
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for (x = 0; x < count; x++) {
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printk("%d ", times[x]);
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if (((x + 1) % 10) == 0)
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printk("\n");
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}
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printk("\nDone.\n");
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} else {
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printk("Unable to remap address. Please try again later.\n");
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}
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} else {
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dev = dev_get_by_name("eth0");
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if (dev) {
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printk("Eth0: MemStart: %#lx MemEnd: %#lx I/O Addr: %#lx\n",
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dev->mem_start, dev->mem_end, dev->base_addr);
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dev_put(dev);
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}
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dev = 0;
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dev = dev_get_by_name("eth1");
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if (dev) {
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printk("Eth1: MemStart: %#lx MemEnd: %#lx I/O Addr: %#lx\n",
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dev->mem_start, dev->mem_end, dev->base_addr);
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dev_put(dev);
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}
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printk("Required information not supplied.\n");
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}
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return 0;
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}
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#ifdef __i386__
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static inline uint32_t cycleCounter(uint32_t dep)
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{
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uint32_t time;
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cpuid_eax(0);
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rdtscl(time);
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cpuid_eax(0);
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return time;
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}
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#elif __alpha__
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inline uint32_t cycleCounter(uint32_t dep)
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{
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uint32_t res;
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asm volatile ("rpcc %0, %1" : "=r"(res) : "r" (dep) : "memory");
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return res;
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}
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#else
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#error Architecture NOT SUPPORTED
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#endif
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static void __exit devtime_end(void)
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{
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printk("Devtime Driver Version %s Unloaded...\n", DRIVER_VER);
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}
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module_init(devtime_start);
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module_exit(devtime_end);
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MODULE_LICENSE("Dual BSD/GPL");
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MODULE_AUTHOR(DRIVER_AUTHOR);
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MODULE_DESCRIPTION(DRIVER_DESC);
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module_param(dataAddr, charp, 0);
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module_param(count, int, 0);
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#ifdef __alpha__
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module_param(memTest, int, 0);
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#endif
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