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Adding gem5 source to svn.

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git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1819 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
This commit is contained in:
friemel
2012-10-24 19:18:57 +00:00
parent f7ff71bd46
commit b41eec3f65
3222 changed files with 658579 additions and 1 deletions
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292
simulators/gem5/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/config.ini Normal file
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[root]
type=Root
children=system
full_system=false
time_sync_enable=false
time_sync_period=100000000
time_sync_spin_threshold=100000
[system]
type=System
children=dir_cntrl0 l1_cntrl0 l2_cntrl0 physmem ruby sys_port_proxy tester
boot_osflags=a
init_param=0
kernel=
load_addr_mask=1099511627775
mem_mode=timing
memories=system.physmem
num_work_ids=16
readfile=
symbolfile=
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
work_begin_exit_count=0
work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.sys_port_proxy.slave[0]
[system.dir_cntrl0]
type=Directory_Controller
children=directory memBuffer
buffer_size=0
cntrl_id=2
directory=system.dir_cntrl0.directory
directory_latency=6
memBuffer=system.dir_cntrl0.memBuffer
number_of_TBEs=256
recycle_latency=10
ruby_system=system.ruby
to_mem_ctrl_latency=1
transitions_per_cycle=32
version=0
[system.dir_cntrl0.directory]
type=RubyDirectoryMemory
map_levels=4
numa_high_bit=6
size=134217728
use_map=false
version=0
[system.dir_cntrl0.memBuffer]
type=RubyMemoryControl
bank_bit_0=8
bank_busy_time=11
bank_queue_size=12
banks_per_rank=8
basic_bus_busy_time=2
dimm_bit_0=12
dimms_per_channel=2
mem_bus_cycle_multiplier=10
mem_ctl_latency=12
mem_fixed_delay=0
mem_random_arbitrate=0
rank_bit_0=11
rank_rank_delay=1
ranks_per_dimm=2
read_write_delay=2
refresh_period=1560
tFaw=0
version=0
[system.l1_cntrl0]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory sequencer
L1DcacheMemory=system.l1_cntrl0.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl0.L1IcacheMemory
buffer_size=0
cntrl_id=0
l1_request_latency=2
l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
recycle_latency=10
ruby_system=system.ruby
send_evictions=false
sequencer=system.l1_cntrl0.sequencer
to_l2_latency=1
transitions_per_cycle=32
version=0
[system.l1_cntrl0.L1DcacheMemory]
type=RubyCache
assoc=2
is_icache=false
latency=3
replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl0.L1IcacheMemory]
type=RubyCache
assoc=2
is_icache=false
latency=3
replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl0.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl0.L1DcacheMemory
deadlock_threshold=500000
icache=system.l1_cntrl0.L1IcacheMemory
max_outstanding_requests=16
ruby_system=system.ruby
support_data_reqs=true
support_inst_reqs=true
system=system
using_network_tester=false
using_ruby_tester=true
version=0
slave=system.tester.cpuDataPort[0] system.tester.cpuInstPort[0]
[system.l2_cntrl0]
type=L2Cache_Controller
children=L2cacheMemory
L2cacheMemory=system.l2_cntrl0.L2cacheMemory
buffer_size=0
cntrl_id=1
l2_request_latency=2
l2_response_latency=2
number_of_TBEs=256
recycle_latency=10
ruby_system=system.ruby
to_l1_latency=1
transitions_per_cycle=32
version=0
[system.l2_cntrl0.L2cacheMemory]
type=RubyCache
assoc=2
is_icache=false
latency=15
replacement_policy=PSEUDO_LRU
size=512
start_index_bit=6
[system.physmem]
type=SimpleMemory
conf_table_reported=false
file=
in_addr_map=true
latency=30
latency_var=0
null=false
range=0:134217727
zero=false
[system.ruby]
type=RubySystem
children=network profiler
block_size_bytes=64
clock=1
mem_size=134217728
no_mem_vec=false
random_seed=1234
randomization=true
stats_filename=ruby.stats
[system.ruby.network]
type=SimpleNetwork
children=topology
adaptive_routing=false
buffer_size=0
control_msg_size=8
endpoint_bandwidth=1000
number_of_virtual_networks=10
ruby_system=system.ruby
topology=system.ruby.network.topology
[system.ruby.network.topology]
type=Topology
children=ext_links0 ext_links1 ext_links2 int_links0 int_links1 int_links2 routers0 routers1 routers2 routers3
description=Crossbar
ext_links=system.ruby.network.topology.ext_links0 system.ruby.network.topology.ext_links1 system.ruby.network.topology.ext_links2
int_links=system.ruby.network.topology.int_links0 system.ruby.network.topology.int_links1 system.ruby.network.topology.int_links2
print_config=false
routers=system.ruby.network.topology.routers0 system.ruby.network.topology.routers1 system.ruby.network.topology.routers2 system.ruby.network.topology.routers3
[system.ruby.network.topology.ext_links0]
type=SimpleExtLink
bandwidth_factor=16
ext_node=system.l1_cntrl0
int_node=system.ruby.network.topology.routers0
latency=1
link_id=0
weight=1
[system.ruby.network.topology.ext_links1]
type=SimpleExtLink
bandwidth_factor=16
ext_node=system.l2_cntrl0
int_node=system.ruby.network.topology.routers1
latency=1
link_id=1
weight=1
[system.ruby.network.topology.ext_links2]
type=SimpleExtLink
bandwidth_factor=16
ext_node=system.dir_cntrl0
int_node=system.ruby.network.topology.routers2
latency=1
link_id=2
weight=1
[system.ruby.network.topology.int_links0]
type=SimpleIntLink
bandwidth_factor=16
latency=1
link_id=3
node_a=system.ruby.network.topology.routers0
node_b=system.ruby.network.topology.routers3
weight=1
[system.ruby.network.topology.int_links1]
type=SimpleIntLink
bandwidth_factor=16
latency=1
link_id=4
node_a=system.ruby.network.topology.routers1
node_b=system.ruby.network.topology.routers3
weight=1
[system.ruby.network.topology.int_links2]
type=SimpleIntLink
bandwidth_factor=16
latency=1
link_id=5
node_a=system.ruby.network.topology.routers2
node_b=system.ruby.network.topology.routers3
weight=1
[system.ruby.network.topology.routers0]
type=BasicRouter
router_id=0
[system.ruby.network.topology.routers1]
type=BasicRouter
router_id=1
[system.ruby.network.topology.routers2]
type=BasicRouter
router_id=2
[system.ruby.network.topology.routers3]
type=BasicRouter
router_id=3
[system.ruby.profiler]
type=RubyProfiler
all_instructions=false
hot_lines=false
num_of_sequencers=1
ruby_system=system.ruby
[system.sys_port_proxy]
type=RubyPortProxy
access_phys_mem=true
ruby_system=system.ruby
support_data_reqs=true
support_inst_reqs=true
system=system
using_network_tester=false
using_ruby_tester=false
version=0
slave=system.system_port
[system.tester]
type=RubyTester
check_flush=false
checks_to_complete=100
deadlock_threshold=50000
num_cpus=1
system=system
wakeup_frequency=10
cpuDataPort=system.l1_cntrl0.sequencer.slave[0]
cpuInstPort=system.l1_cntrl0.sequencer.slave[1]

636
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================ Begin RubySystem Configuration Print ================
RubySystem config:
random_seed: 1234
randomization: 1
cycle_period: 1
block_size_bytes: 64
block_size_bits: 6
memory_size_bytes: 134217728
memory_size_bits: 27
Network Configuration
---------------------
network: SIMPLE_NETWORK
topology:
virtual_net_0: active, unordered
virtual_net_1: active, unordered
virtual_net_2: active, unordered
virtual_net_3: inactive
virtual_net_4: inactive
virtual_net_5: inactive
virtual_net_6: inactive
virtual_net_7: inactive
virtual_net_8: inactive
virtual_net_9: inactive
Profiler Configuration
----------------------
periodic_stats_period: 1000000
================ End RubySystem Configuration Print ================
Real time: Jun/04/2012 14:40:53
Profiler Stats
--------------
Elapsed_time_in_seconds: 0
Elapsed_time_in_minutes: 0
Elapsed_time_in_hours: 0
Elapsed_time_in_days: 0
Virtual_time_in_seconds: 0.36
Virtual_time_in_minutes: 0.006
Virtual_time_in_hours: 0.0001
Virtual_time_in_days: 4.16667e-06
Ruby_current_time: 349711
Ruby_start_time: 0
Ruby_cycles: 349711
mbytes_resident: 43.2695
mbytes_total: 216.074
resident_ratio: 0.200253
ruby_cycles_executed: [ 349712 ]
Busy Controller Counts:
L1Cache-0:0
L2Cache-0:0
Directory-0:0
Busy Bank Count:0
sequencer_requests_outstanding: [binsize: 1 max: 16 count: 994 average: 15.841 | standard deviation: 1.12331 | 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 39 941 ]
All Non-Zero Cycle Demand Cache Accesses
----------------------------------------
miss_latency: [binsize: 64 max: 8736 count: 979 average: 5661.07 | standard deviation: 2367.21 | 72 10 0 0 2 2 5 2 5 4 6 8 4 7 3 2 4 3 2 4 3 1 1 1 0 1 1 0 2 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 2 1 1 2 8 4 5 9 6 8 9 19 21 27 27 32 32 32 39 32 43 26 27 28 36 34 35 22 24 33 26 22 19 22 17 14 7 2 16 6 5 11 5 4 3 3 1 2 0 2 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_LD: [binsize: 64 max: 8339 count: 44 average: 6147 | standard deviation: 2036.5 | 3 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 2 2 1 1 1 1 4 4 1 1 3 2 0 2 1 1 0 3 1 1 1 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 1 ]
miss_latency_ST: [binsize: 64 max: 8736 count: 879 average: 5937.77 | standard deviation: 2125.68 | 69 9 0 0 2 0 3 2 2 0 3 0 1 2 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 2 1 1 2 8 4 5 9 6 8 9 19 19 25 25 31 31 31 38 28 39 25 26 25 34 34 33 21 23 33 23 21 18 21 17 13 7 2 16 5 5 11 5 3 3 3 1 1 0 1 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_IFETCH: [binsize: 16 max: 1853 count: 56 average: 936.107 | standard deviation: 353.831 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 2 0 0 0 0 0 1 0 2 0 0 1 1 2 3 0 0 0 2 0 4 2 0 1 1 1 0 4 1 0 1 0 1 1 1 1 0 0 2 2 0 0 1 0 0 1 1 0 1 0 1 1 1 1 1 2 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_NULL: [binsize: 64 max: 8736 count: 979 average: 5661.07 | standard deviation: 2367.21 | 72 10 0 0 2 2 5 2 5 4 6 8 4 7 3 2 4 3 2 4 3 1 1 1 0 1 1 0 2 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 2 1 1 2 8 4 5 9 6 8 9 19 21 27 27 32 32 32 39 32 43 26 27 28 36 34 35 22 24 33 26 22 19 22 17 14 7 2 16 6 5 11 5 4 3 3 1 2 0 2 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
imcomplete_wCC_Times: 0
miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
imcomplete_dir_Times: 0
miss_latency_LD_NULL: [binsize: 64 max: 8339 count: 44 average: 6147 | standard deviation: 2036.5 | 3 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 2 2 1 1 1 1 4 4 1 1 3 2 0 2 1 1 0 3 1 1 1 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 1 ]
miss_latency_ST_NULL: [binsize: 64 max: 8736 count: 879 average: 5937.77 | standard deviation: 2125.68 | 69 9 0 0 2 0 3 2 2 0 3 0 1 2 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 2 1 1 2 8 4 5 9 6 8 9 19 19 25 25 31 31 31 38 28 39 25 26 25 34 34 33 21 23 33 23 21 18 21 17 13 7 2 16 5 5 11 5 3 3 3 1 1 0 1 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_IFETCH_NULL: [binsize: 16 max: 1853 count: 56 average: 936.107 | standard deviation: 353.831 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 2 0 0 0 0 0 1 0 2 0 0 1 1 2 3 0 0 0 2 0 4 2 0 1 1 1 0 4 1 0 1 0 1 1 1 1 0 0 2 2 0 0 1 0 0 1 1 0 1 0 1 1 1 1 1 2 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
All Non-Zero Cycle SW Prefetch Requests
------------------------------------
prefetch_latency: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
prefetch_latency_L2Miss:[binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
Request vs. RubySystem State Profile
--------------------------------
filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
Message Delayed Cycles
----------------------
Total_delay_cycles: [binsize: 64 max: 1964 count: 6930 average: 44.9837 | standard deviation: 177.937 | 6277 162 19 77 35 23 39 25 31 46 31 47 16 29 20 14 5 2 2 5 1 3 4 7 1 3 1 1 1 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
Total_nonPF_delay_cycles: [binsize: 1 max: 10 count: 4452 average: 0.269093 | standard deviation: 0.946561 | 4000 119 113 132 37 23 14 8 1 4 1 ]
virtual_network_0_delay_cycles: [binsize: 64 max: 1964 count: 2478 average: 125.318 | standard deviation: 280.209 | 1825 162 19 77 35 23 39 25 31 46 31 47 16 29 20 14 5 2 2 5 1 3 4 7 1 3 1 1 1 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_2_delay_cycles: [binsize: 1 max: 9 count: 549 average: 0.173042 | standard deviation: 0.84036 | 521 4 3 10 5 4 1 0 0 1 ]
virtual_network_3_delay_cycles: [binsize: 1 max: 10 count: 3903 average: 0.282603 | standard deviation: 0.959989 | 3479 115 110 122 32 19 13 8 1 3 1 ]
virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_6_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_7_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_8_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_9_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
Resource Usage
--------------
page_size: 4096
user_time: 0
system_time: 0
page_reclaims: 11518
page_faults: 0
swaps: 0
block_inputs: 0
block_outputs: 88
Network Stats
-------------
total_msg_count_Control: 5280 42240
total_msg_count_Request_Control: 1647 13176
total_msg_count_Response_Data: 7584 546048
total_msg_count_Response_Control: 7733 61864
total_msg_count_Writeback_Data: 3603 259416
total_msg_count_Writeback_Control: 108 864
total_msgs: 25955 total_bytes: 923608
switch_0_inlinks: 2
switch_0_outlinks: 2
links_utilized_percent_switch_0: 1.57251
links_utilized_percent_switch_0_link_0: 1.33853 bw: 16000 base_latency: 1
links_utilized_percent_switch_0_link_1: 1.80649 bw: 16000 base_latency: 1
outgoing_messages_switch_0_link_0_Request_Control: 549 4392 [ 549 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_0_Response_Data: 897 64584 [ 0 897 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_0_Response_Control: 740 5920 [ 0 740 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_1_Control: 898 7184 [ 898 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_1_Response_Control: 892 7136 [ 0 52 840 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_1_Writeback_Data: 1201 86472 [ 704 497 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_1_Writeback_Control: 36 288 [ 36 0 0 0 0 0 0 0 0 0 ] base_latency: 1
switch_1_inlinks: 2
switch_1_outlinks: 2
links_utilized_percent_switch_1: 2.75106
links_utilized_percent_switch_1_link_0: 3.03694 bw: 16000 base_latency: 1
links_utilized_percent_switch_1_link_1: 2.46518 bw: 16000 base_latency: 1
outgoing_messages_switch_1_link_0_Control: 898 7184 [ 898 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_0_Response_Data: 861 61992 [ 0 861 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_0_Response_Control: 1749 13992 [ 0 909 840 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_0_Writeback_Data: 1201 86472 [ 704 497 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_0_Writeback_Control: 36 288 [ 36 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_1_Control: 862 6896 [ 862 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_1_Request_Control: 549 4392 [ 549 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_1_Response_Data: 1667 120024 [ 0 1667 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_1_Response_Control: 828 6624 [ 0 828 0 0 0 0 0 0 0 0 ] base_latency: 1
switch_2_inlinks: 2
switch_2_outlinks: 2
links_utilized_percent_switch_2: 1.17862
links_utilized_percent_switch_2_link_0: 1.12664 bw: 16000 base_latency: 1
links_utilized_percent_switch_2_link_1: 1.23059 bw: 16000 base_latency: 1
outgoing_messages_switch_2_link_0_Control: 862 6896 [ 862 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_0_Response_Data: 770 55440 [ 0 770 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_0_Response_Control: 88 704 [ 0 88 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_1_Response_Data: 861 61992 [ 0 861 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_1_Response_Control: 858 6864 [ 0 858 0 0 0 0 0 0 0 0 ] base_latency: 1
switch_3_inlinks: 3
switch_3_outlinks: 3
links_utilized_percent_switch_3: 1.83409
links_utilized_percent_switch_3_link_0: 1.33853 bw: 16000 base_latency: 1
links_utilized_percent_switch_3_link_1: 3.03708 bw: 16000 base_latency: 1
links_utilized_percent_switch_3_link_2: 1.12664 bw: 16000 base_latency: 1
outgoing_messages_switch_3_link_0_Request_Control: 549 4392 [ 549 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_0_Response_Data: 897 64584 [ 0 897 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_0_Response_Control: 740 5920 [ 0 740 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_1_Control: 898 7184 [ 898 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_1_Response_Data: 861 61992 [ 0 861 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_1_Response_Control: 1750 14000 [ 0 910 840 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_1_Writeback_Data: 1201 86472 [ 704 497 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_1_Writeback_Control: 36 288 [ 36 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_2_Control: 862 6896 [ 862 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_2_Response_Data: 770 55440 [ 0 770 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_2_Response_Control: 88 704 [ 0 88 0 0 0 0 0 0 0 0 ] base_latency: 1
Cache Stats: system.l1_cntrl0.L1IcacheMemory
system.l1_cntrl0.L1IcacheMemory_total_misses: 56
system.l1_cntrl0.L1IcacheMemory_total_demand_misses: 56
system.l1_cntrl0.L1IcacheMemory_total_prefetches: 0
system.l1_cntrl0.L1IcacheMemory_total_sw_prefetches: 0
system.l1_cntrl0.L1IcacheMemory_total_hw_prefetches: 0
system.l1_cntrl0.L1IcacheMemory_request_type_IFETCH: 100%
system.l1_cntrl0.L1IcacheMemory_access_mode_type_Supervisor: 56 100%
Cache Stats: system.l1_cntrl0.L1DcacheMemory
system.l1_cntrl0.L1DcacheMemory_total_misses: 842
system.l1_cntrl0.L1DcacheMemory_total_demand_misses: 842
system.l1_cntrl0.L1DcacheMemory_total_prefetches: 0
system.l1_cntrl0.L1DcacheMemory_total_sw_prefetches: 0
system.l1_cntrl0.L1DcacheMemory_total_hw_prefetches: 0
system.l1_cntrl0.L1DcacheMemory_request_type_LD: 4.86936%
system.l1_cntrl0.L1DcacheMemory_request_type_ST: 95.1306%
system.l1_cntrl0.L1DcacheMemory_access_mode_type_Supervisor: 842 100%
--- L1Cache ---
- Event Counts -
Load [45 ] 45
Ifetch [62 ] 62
Store [879 ] 879
Inv [549 ] 549
L1_Replacement [10481 ] 10481
Fwd_GETX [0 ] 0
Fwd_GETS [0 ] 0
Fwd_GET_INSTR [0 ] 0
Data [0 ] 0
Data_Exclusive [40 ] 40
DataS_fromL1 [0 ] 0
Data_all_Acks [857 ] 857
Ack [0 ] 0
Ack_all [0 ] 0
WB_Ack [740 ] 740
- Transitions -
NP Load [41 ] 41
NP Ifetch [56 ] 56
NP Store [801 ] 801
NP Inv [1 ] 1
NP L1_Replacement [0 ] 0
I Load [0 ] 0
I Ifetch [0 ] 0
I Store [0 ] 0
I Inv [0 ] 0
I L1_Replacement [146 ] 146
S Load [0 ] 0
S Ifetch [0 ] 0
S Store [0 ] 0
S Inv [27 ] 27
S L1_Replacement [7 ] 7
E Load [0 ] 0
E Ifetch [0 ] 0
E Store [1 ] 1
E Inv [2 ] 2
E L1_Replacement [36 ] 36
E Fwd_GETX [0 ] 0
E Fwd_GETS [0 ] 0
E Fwd_GET_INSTR [0 ] 0
M Load [4 ] 4
M Ifetch [0 ] 0
M Store [77 ] 77
M Inv [97 ] 97
M L1_Replacement [704 ] 704
M Fwd_GETX [0 ] 0
M Fwd_GETS [0 ] 0
M Fwd_GET_INSTR [0 ] 0
IS Load [0 ] 0
IS Ifetch [0 ] 0
IS Store [0 ] 0
IS Inv [22 ] 22
IS L1_Replacement [508 ] 508
IS Data_Exclusive [40 ] 40
IS DataS_fromL1 [0 ] 0
IS Data_all_Acks [34 ] 34
IM Load [0 ] 0
IM Ifetch [0 ] 0
IM Store [0 ] 0
IM Inv [0 ] 0
IM L1_Replacement [9080 ] 9080
IM Data [0 ] 0
IM Data_all_Acks [801 ] 801
IM Ack [0 ] 0
SM Load [0 ] 0
SM Ifetch [0 ] 0
SM Store [0 ] 0
SM Inv [0 ] 0
SM L1_Replacement [0 ] 0
SM Ack [0 ] 0
SM Ack_all [0 ] 0
IS_I Load [0 ] 0
IS_I Ifetch [0 ] 0
IS_I Store [0 ] 0
IS_I Inv [0 ] 0
IS_I L1_Replacement [0 ] 0
IS_I Data_Exclusive [0 ] 0
IS_I DataS_fromL1 [0 ] 0
IS_I Data_all_Acks [22 ] 22
M_I Load [0 ] 0
M_I Ifetch [6 ] 6
M_I Store [0 ] 0
M_I Inv [400 ] 400
M_I L1_Replacement [0 ] 0
M_I Fwd_GETX [0 ] 0
M_I Fwd_GETS [0 ] 0
M_I Fwd_GET_INSTR [0 ] 0
M_I WB_Ack [340 ] 340
SINK_WB_ACK Load [0 ] 0
SINK_WB_ACK Ifetch [0 ] 0
SINK_WB_ACK Store [0 ] 0
SINK_WB_ACK Inv [0 ] 0
SINK_WB_ACK L1_Replacement [0 ] 0
SINK_WB_ACK WB_Ack [400 ] 400
Cache Stats: system.l2_cntrl0.L2cacheMemory
system.l2_cntrl0.L2cacheMemory_total_misses: 862
system.l2_cntrl0.L2cacheMemory_total_demand_misses: 862
system.l2_cntrl0.L2cacheMemory_total_prefetches: 0
system.l2_cntrl0.L2cacheMemory_total_sw_prefetches: 0
system.l2_cntrl0.L2cacheMemory_total_hw_prefetches: 0
system.l2_cntrl0.L2cacheMemory_request_type_GETS: 4.75638%
system.l2_cntrl0.L2cacheMemory_request_type_GET_INSTR: 5.80046%
system.l2_cntrl0.L2cacheMemory_request_type_GETX: 89.4432%
system.l2_cntrl0.L2cacheMemory_access_mode_type_Supervisor: 862 100%
--- L2Cache ---
- Event Counts -
L1_GET_INSTR [56 ] 56
L1_GETS [41 ] 41
L1_GETX [801 ] 801
L1_UPGRADE [0 ] 0
L1_PUTX [349 ] 349
L1_PUTX_old [757 ] 757
Fwd_L1_GETX [0 ] 0
Fwd_L1_GETS [0 ] 0
Fwd_L1_GET_INSTR [0 ] 0
L2_Replacement [297 ] 297
L2_Replacement_clean [1183 ] 1183
Mem_Data [861 ] 861
Mem_Ack [856 ] 856
WB_Data [473 ] 473
WB_Data_clean [24 ] 24
Ack [0 ] 0
Ack_all [52 ] 52
Unblock [0 ] 0
Unblock_Cancel [0 ] 0
Exclusive_Unblock [840 ] 840
MEM_Inv [0 ] 0
- Transitions -
NP L1_GET_INSTR [50 ] 50
NP L1_GETS [41 ] 41
NP L1_GETX [771 ] 771
NP L1_PUTX [0 ] 0
NP L1_PUTX_old [264 ] 264
SS L1_GET_INSTR [0 ] 0
SS L1_GETS [0 ] 0
SS L1_GETX [6 ] 6
SS L1_UPGRADE [0 ] 0
SS L1_PUTX [0 ] 0
SS L1_PUTX_old [0 ] 0
SS L2_Replacement [0 ] 0
SS L2_Replacement_clean [50 ] 50
SS MEM_Inv [0 ] 0
M L1_GET_INSTR [6 ] 6
M L1_GETS [0 ] 0
M L1_GETX [24 ] 24
M L1_PUTX [0 ] 0
M L1_PUTX_old [0 ] 0
M L2_Replacement [297 ] 297
M L2_Replacement_clean [12 ] 12
M MEM_Inv [0 ] 0
MT L1_GET_INSTR [0 ] 0
MT L1_GETS [0 ] 0
MT L1_GETX [0 ] 0
MT L1_PUTX [340 ] 340
MT L1_PUTX_old [0 ] 0
MT L2_Replacement [0 ] 0
MT L2_Replacement_clean [499 ] 499
MT MEM_Inv [0 ] 0
M_I L1_GET_INSTR [0 ] 0
M_I L1_GETS [0 ] 0
M_I L1_GETX [0 ] 0
M_I L1_UPGRADE [0 ] 0
M_I L1_PUTX [0 ] 0
M_I L1_PUTX_old [136 ] 136
M_I Mem_Ack [856 ] 856
M_I MEM_Inv [0 ] 0
MT_I L1_GET_INSTR [0 ] 0
MT_I L1_GETS [0 ] 0
MT_I L1_GETX [0 ] 0
MT_I L1_UPGRADE [0 ] 0
MT_I L1_PUTX [0 ] 0
MT_I L1_PUTX_old [0 ] 0
MT_I WB_Data [0 ] 0
MT_I WB_Data_clean [0 ] 0
MT_I Ack_all [0 ] 0
MT_I MEM_Inv [0 ] 0
MCT_I L1_GET_INSTR [0 ] 0
MCT_I L1_GETS [0 ] 0
MCT_I L1_GETX [0 ] 0
MCT_I L1_UPGRADE [0 ] 0
MCT_I L1_PUTX [0 ] 0
MCT_I L1_PUTX_old [181 ] 181
MCT_I WB_Data [473 ] 473
MCT_I WB_Data_clean [24 ] 24
MCT_I Ack_all [2 ] 2
I_I L1_GET_INSTR [0 ] 0
I_I L1_GETS [0 ] 0
I_I L1_GETX [0 ] 0
I_I L1_UPGRADE [0 ] 0
I_I L1_PUTX [0 ] 0
I_I L1_PUTX_old [0 ] 0
I_I Ack [0 ] 0
I_I Ack_all [50 ] 50
S_I L1_GET_INSTR [0 ] 0
S_I L1_GETS [0 ] 0
S_I L1_GETX [0 ] 0
S_I L1_UPGRADE [0 ] 0
S_I L1_PUTX [0 ] 0
S_I L1_PUTX_old [0 ] 0
S_I Ack [0 ] 0
S_I Ack_all [0 ] 0
S_I MEM_Inv [0 ] 0
ISS L1_GET_INSTR [0 ] 0
ISS L1_GETS [0 ] 0
ISS L1_GETX [0 ] 0
ISS L1_PUTX [0 ] 0
ISS L1_PUTX_old [0 ] 0
ISS L2_Replacement [0 ] 0
ISS L2_Replacement_clean [14 ] 14
ISS Mem_Data [40 ] 40
ISS MEM_Inv [0 ] 0
IS L1_GET_INSTR [0 ] 0
IS L1_GETS [0 ] 0
IS L1_GETX [0 ] 0
IS L1_PUTX [0 ] 0
IS L1_PUTX_old [0 ] 0
IS L2_Replacement [0 ] 0
IS L2_Replacement_clean [69 ] 69
IS Mem_Data [50 ] 50
IS MEM_Inv [0 ] 0
IM L1_GET_INSTR [0 ] 0
IM L1_GETS [0 ] 0
IM L1_GETX [0 ] 0
IM L1_PUTX [0 ] 0
IM L1_PUTX_old [0 ] 0
IM L2_Replacement [0 ] 0
IM L2_Replacement_clean [225 ] 225
IM Mem_Data [771 ] 771
IM MEM_Inv [0 ] 0
SS_MB L1_GET_INSTR [0 ] 0
SS_MB L1_GETS [0 ] 0
SS_MB L1_GETX [0 ] 0
SS_MB L1_UPGRADE [0 ] 0
SS_MB L1_PUTX [0 ] 0
SS_MB L1_PUTX_old [0 ] 0
SS_MB L2_Replacement [0 ] 0
SS_MB L2_Replacement_clean [0 ] 0
SS_MB Unblock_Cancel [0 ] 0
SS_MB Exclusive_Unblock [6 ] 6
SS_MB MEM_Inv [0 ] 0
MT_MB L1_GET_INSTR [0 ] 0
MT_MB L1_GETS [0 ] 0
MT_MB L1_GETX [0 ] 0
MT_MB L1_UPGRADE [0 ] 0
MT_MB L1_PUTX [9 ] 9
MT_MB L1_PUTX_old [176 ] 176
MT_MB L2_Replacement [0 ] 0
MT_MB L2_Replacement_clean [314 ] 314
MT_MB Unblock_Cancel [0 ] 0
MT_MB Exclusive_Unblock [834 ] 834
MT_MB MEM_Inv [0 ] 0
M_MB L1_GET_INSTR [0 ] 0
M_MB L1_GETS [0 ] 0
M_MB L1_GETX [0 ] 0
M_MB L1_UPGRADE [0 ] 0
M_MB L1_PUTX [0 ] 0
M_MB L1_PUTX_old [0 ] 0
M_MB L2_Replacement [0 ] 0
M_MB L2_Replacement_clean [0 ] 0
M_MB Exclusive_Unblock [0 ] 0
M_MB MEM_Inv [0 ] 0
MT_IIB L1_GET_INSTR [0 ] 0
MT_IIB L1_GETS [0 ] 0
MT_IIB L1_GETX [0 ] 0
MT_IIB L1_UPGRADE [0 ] 0
MT_IIB L1_PUTX [0 ] 0
MT_IIB L1_PUTX_old [0 ] 0
MT_IIB L2_Replacement [0 ] 0
MT_IIB L2_Replacement_clean [0 ] 0
MT_IIB WB_Data [0 ] 0
MT_IIB WB_Data_clean [0 ] 0
MT_IIB Unblock [0 ] 0
MT_IIB MEM_Inv [0 ] 0
MT_IB L1_GET_INSTR [0 ] 0
MT_IB L1_GETS [0 ] 0
MT_IB L1_GETX [0 ] 0
MT_IB L1_UPGRADE [0 ] 0
MT_IB L1_PUTX [0 ] 0
MT_IB L1_PUTX_old [0 ] 0
MT_IB L2_Replacement [0 ] 0
MT_IB L2_Replacement_clean [0 ] 0
MT_IB WB_Data [0 ] 0
MT_IB WB_Data_clean [0 ] 0
MT_IB Unblock_Cancel [0 ] 0
MT_IB MEM_Inv [0 ] 0
MT_SB L1_GET_INSTR [0 ] 0
MT_SB L1_GETS [0 ] 0
MT_SB L1_GETX [0 ] 0
MT_SB L1_UPGRADE [0 ] 0
MT_SB L1_PUTX [0 ] 0
MT_SB L1_PUTX_old [0 ] 0
MT_SB L2_Replacement [0 ] 0
MT_SB L2_Replacement_clean [0 ] 0
MT_SB Unblock [0 ] 0
MT_SB MEM_Inv [0 ] 0
Memory controller: system.dir_cntrl0.memBuffer:
memory_total_requests: 1632
memory_reads: 861
memory_writes: 770
memory_refreshes: 729
memory_total_request_delays: 1043
memory_delays_per_request: 0.639093
memory_delays_in_input_queue: 147
memory_delays_behind_head_of_bank_queue: 0
memory_delays_stalled_at_head_of_bank_queue: 896
memory_stalls_for_bank_busy: 170
memory_stalls_for_random_busy: 0
memory_stalls_for_anti_starvation: 0
memory_stalls_for_arbitration: 70
memory_stalls_for_bus: 355
memory_stalls_for_tfaw: 0
memory_stalls_for_read_write_turnaround: 230
memory_stalls_for_read_read_turnaround: 71
accesses_per_bank: 59 40 48 77 75 69 65 47 55 56 48 54 65 48 34 60 44 35 56 37 49 41 46 49 50 48 50 47 58 40 41 41
--- Directory ---
- Event Counts -
Fetch [862 ] 862
Data [770 ] 770
Memory_Data [861 ] 861
Memory_Ack [770 ] 770
DMA_READ [0 ] 0
DMA_WRITE [0 ] 0
CleanReplacement [88 ] 88
- Transitions -
I Fetch [862 ] 862
I DMA_READ [0 ] 0
I DMA_WRITE [0 ] 0
ID Fetch [0 ] 0
ID Data [0 ] 0
ID Memory_Data [0 ] 0
ID DMA_READ [0 ] 0
ID DMA_WRITE [0 ] 0
ID_W Fetch [0 ] 0
ID_W Data [0 ] 0
ID_W Memory_Ack [0 ] 0
ID_W DMA_READ [0 ] 0
ID_W DMA_WRITE [0 ] 0
M Data [770 ] 770
M DMA_READ [0 ] 0
M DMA_WRITE [0 ] 0
M CleanReplacement [88 ] 88
IM Fetch [0 ] 0
IM Data [0 ] 0
IM Memory_Data [861 ] 861
IM DMA_READ [0 ] 0
IM DMA_WRITE [0 ] 0
MI Fetch [0 ] 0
MI Data [0 ] 0
MI Memory_Ack [770 ] 770
MI DMA_READ [0 ] 0
MI DMA_WRITE [0 ] 0
M_DRD Data [0 ] 0
M_DRD DMA_READ [0 ] 0
M_DRD DMA_WRITE [0 ] 0
M_DRDI Fetch [0 ] 0
M_DRDI Data [0 ] 0
M_DRDI Memory_Ack [0 ] 0
M_DRDI DMA_READ [0 ] 0
M_DRDI DMA_WRITE [0 ] 0
M_DWR Data [0 ] 0
M_DWR DMA_READ [0 ] 0
M_DWR DMA_WRITE [0 ] 0
M_DWRI Fetch [0 ] 0
M_DWRI Data [0 ] 0
M_DWRI Memory_Ack [0 ] 0
M_DWRI DMA_READ [0 ] 0
M_DWRI DMA_WRITE [0 ] 0

1
simulators/gem5/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simerr Executable file
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@ -0,0 +1 @@
hack: be nice to actually delete the event here

10
simulators/gem5/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simout Executable file
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@ -0,0 +1,10 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Jun 4 2012 11:53:20
gem5 started Jun 4 2012 14:40:53
gem5 executing on zizzer
command line: build/ALPHA_MESI_CMP_directory/gem5.opt -d build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MESI_CMP_directory -re tests/run.py build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MESI_CMP_directory
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Exiting @ tick 349711 because Ruby Tester completed

11
simulators/gem5/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt Normal file
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@ -0,0 +1,11 @@
---------- Begin Simulation Statistics ----------
sim_seconds 0.000350 # Number of seconds simulated
sim_ticks 349711 # Number of ticks simulated
final_tick 349711 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
host_tick_rate 2288501 # Simulator tick rate (ticks/s)
host_mem_usage 221264 # Number of bytes of host memory used
host_seconds 0.15 # Real time elapsed on the host
---------- End Simulation Statistics ----------

288
simulators/gem5/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/config.ini Normal file
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[root]
type=Root
children=system
full_system=false
time_sync_enable=false
time_sync_period=100000000
time_sync_spin_threshold=100000
[system]
type=System
children=dir_cntrl0 l1_cntrl0 l2_cntrl0 physmem ruby sys_port_proxy tester
boot_osflags=a
init_param=0
kernel=
load_addr_mask=1099511627775
mem_mode=timing
memories=system.physmem
num_work_ids=16
readfile=
symbolfile=
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
work_begin_exit_count=0
work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.sys_port_proxy.slave[0]
[system.dir_cntrl0]
type=Directory_Controller
children=directory memBuffer
buffer_size=0
cntrl_id=2
directory=system.dir_cntrl0.directory
directory_latency=6
memBuffer=system.dir_cntrl0.memBuffer
number_of_TBEs=256
recycle_latency=10
ruby_system=system.ruby
transitions_per_cycle=32
version=0
[system.dir_cntrl0.directory]
type=RubyDirectoryMemory
map_levels=4
numa_high_bit=6
size=134217728
use_map=false
version=0
[system.dir_cntrl0.memBuffer]
type=RubyMemoryControl
bank_bit_0=8
bank_busy_time=11
bank_queue_size=12
banks_per_rank=8
basic_bus_busy_time=2
dimm_bit_0=12
dimms_per_channel=2
mem_bus_cycle_multiplier=10
mem_ctl_latency=12
mem_fixed_delay=0
mem_random_arbitrate=0
rank_bit_0=11
rank_rank_delay=1
ranks_per_dimm=2
read_write_delay=2
refresh_period=1560
tFaw=0
version=0
[system.l1_cntrl0]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory sequencer
L1DcacheMemory=system.l1_cntrl0.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl0.L1IcacheMemory
buffer_size=0
cntrl_id=0
l2_select_num_bits=0
number_of_TBEs=256
recycle_latency=10
request_latency=2
ruby_system=system.ruby
send_evictions=false
sequencer=system.l1_cntrl0.sequencer
transitions_per_cycle=32
version=0
[system.l1_cntrl0.L1DcacheMemory]
type=RubyCache
assoc=2
is_icache=false
latency=3
replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl0.L1IcacheMemory]
type=RubyCache
assoc=2
is_icache=false
latency=3
replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl0.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl0.L1DcacheMemory
deadlock_threshold=500000
icache=system.l1_cntrl0.L1IcacheMemory
max_outstanding_requests=16
ruby_system=system.ruby
support_data_reqs=true
support_inst_reqs=true
system=system
using_network_tester=false
using_ruby_tester=true
version=0
slave=system.tester.cpuDataPort[0] system.tester.cpuInstPort[0]
[system.l2_cntrl0]
type=L2Cache_Controller
children=L2cacheMemory
L2cacheMemory=system.l2_cntrl0.L2cacheMemory
buffer_size=0
cntrl_id=1
number_of_TBEs=256
recycle_latency=10
request_latency=2
response_latency=2
ruby_system=system.ruby
transitions_per_cycle=32
version=0
[system.l2_cntrl0.L2cacheMemory]
type=RubyCache
assoc=2
is_icache=false
latency=15
replacement_policy=PSEUDO_LRU
size=512
start_index_bit=6
[system.physmem]
type=SimpleMemory
conf_table_reported=false
file=
in_addr_map=true
latency=30
latency_var=0
null=false
range=0:134217727
zero=false
[system.ruby]
type=RubySystem
children=network profiler
block_size_bytes=64
clock=1
mem_size=134217728
no_mem_vec=false
random_seed=1234
randomization=true
stats_filename=ruby.stats
[system.ruby.network]
type=SimpleNetwork
children=topology
adaptive_routing=false
buffer_size=0
control_msg_size=8
endpoint_bandwidth=1000
number_of_virtual_networks=10
ruby_system=system.ruby
topology=system.ruby.network.topology
[system.ruby.network.topology]
type=Topology
children=ext_links0 ext_links1 ext_links2 int_links0 int_links1 int_links2 routers0 routers1 routers2 routers3
description=Crossbar
ext_links=system.ruby.network.topology.ext_links0 system.ruby.network.topology.ext_links1 system.ruby.network.topology.ext_links2
int_links=system.ruby.network.topology.int_links0 system.ruby.network.topology.int_links1 system.ruby.network.topology.int_links2
print_config=false
routers=system.ruby.network.topology.routers0 system.ruby.network.topology.routers1 system.ruby.network.topology.routers2 system.ruby.network.topology.routers3
[system.ruby.network.topology.ext_links0]
type=SimpleExtLink
bandwidth_factor=16
ext_node=system.l1_cntrl0
int_node=system.ruby.network.topology.routers0
latency=1
link_id=0
weight=1
[system.ruby.network.topology.ext_links1]
type=SimpleExtLink
bandwidth_factor=16
ext_node=system.l2_cntrl0
int_node=system.ruby.network.topology.routers1
latency=1
link_id=1
weight=1
[system.ruby.network.topology.ext_links2]
type=SimpleExtLink
bandwidth_factor=16
ext_node=system.dir_cntrl0
int_node=system.ruby.network.topology.routers2
latency=1
link_id=2
weight=1
[system.ruby.network.topology.int_links0]
type=SimpleIntLink
bandwidth_factor=16
latency=1
link_id=3
node_a=system.ruby.network.topology.routers0
node_b=system.ruby.network.topology.routers3
weight=1
[system.ruby.network.topology.int_links1]
type=SimpleIntLink
bandwidth_factor=16
latency=1
link_id=4
node_a=system.ruby.network.topology.routers1
node_b=system.ruby.network.topology.routers3
weight=1
[system.ruby.network.topology.int_links2]
type=SimpleIntLink
bandwidth_factor=16
latency=1
link_id=5
node_a=system.ruby.network.topology.routers2
node_b=system.ruby.network.topology.routers3
weight=1
[system.ruby.network.topology.routers0]
type=BasicRouter
router_id=0
[system.ruby.network.topology.routers1]
type=BasicRouter
router_id=1
[system.ruby.network.topology.routers2]
type=BasicRouter
router_id=2
[system.ruby.network.topology.routers3]
type=BasicRouter
router_id=3
[system.ruby.profiler]
type=RubyProfiler
all_instructions=false
hot_lines=false
num_of_sequencers=1
ruby_system=system.ruby
[system.sys_port_proxy]
type=RubyPortProxy
access_phys_mem=true
ruby_system=system.ruby
support_data_reqs=true
support_inst_reqs=true
system=system
using_network_tester=false
using_ruby_tester=false
version=0
slave=system.system_port
[system.tester]
type=RubyTester
check_flush=false
checks_to_complete=100
deadlock_threshold=50000
num_cpus=1
system=system
wakeup_frequency=10
cpuDataPort=system.l1_cntrl0.sequencer.slave[0]
cpuInstPort=system.l1_cntrl0.sequencer.slave[1]

1470
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hack: be nice to actually delete the event here

10
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gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Jun 4 2012 11:54:55
gem5 started Jun 4 2012 14:42:00
gem5 executing on zizzer
command line: build/ALPHA_MOESI_CMP_directory/gem5.opt -d build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_directory -re tests/run.py build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_directory
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Exiting @ tick 357561 because Ruby Tester completed

11
simulators/gem5/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/stats.txt Normal file
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---------- Begin Simulation Statistics ----------
sim_seconds 0.000358 # Number of seconds simulated
sim_ticks 357561 # Number of ticks simulated
final_tick 357561 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
host_tick_rate 776030 # Simulator tick rate (ticks/s)
host_mem_usage 221440 # Number of bytes of host memory used
host_seconds 0.46 # Real time elapsed on the host
---------- End Simulation Statistics ----------

299
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[root]
type=Root
children=system
full_system=false
time_sync_enable=false
time_sync_period=100000000
time_sync_spin_threshold=100000
[system]
type=System
children=dir_cntrl0 l1_cntrl0 l2_cntrl0 physmem ruby sys_port_proxy tester
boot_osflags=a
init_param=0
kernel=
load_addr_mask=1099511627775
mem_mode=timing
memories=system.physmem
num_work_ids=16
readfile=
symbolfile=
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
work_begin_exit_count=0
work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.sys_port_proxy.slave[0]
[system.dir_cntrl0]
type=Directory_Controller
children=directory memBuffer
buffer_size=0
cntrl_id=2
directory=system.dir_cntrl0.directory
directory_latency=5
distributed_persistent=true
fixed_timeout_latency=100
l2_select_num_bits=0
memBuffer=system.dir_cntrl0.memBuffer
number_of_TBEs=256
recycle_latency=10
ruby_system=system.ruby
transitions_per_cycle=32
version=0
[system.dir_cntrl0.directory]
type=RubyDirectoryMemory
map_levels=4
numa_high_bit=6
size=134217728
use_map=false
version=0
[system.dir_cntrl0.memBuffer]
type=RubyMemoryControl
bank_bit_0=8
bank_busy_time=11
bank_queue_size=12
banks_per_rank=8
basic_bus_busy_time=2
dimm_bit_0=12
dimms_per_channel=2
mem_bus_cycle_multiplier=10
mem_ctl_latency=12
mem_fixed_delay=0
mem_random_arbitrate=0
rank_bit_0=11
rank_rank_delay=1
ranks_per_dimm=2
read_write_delay=2
refresh_period=1560
tFaw=0
version=0
[system.l1_cntrl0]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory sequencer
L1DcacheMemory=system.l1_cntrl0.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl0.L1IcacheMemory
N_tokens=2
buffer_size=0
cntrl_id=0
dynamic_timeout_enabled=true
fixed_timeout_latency=300
l1_request_latency=2
l1_response_latency=2
l2_select_num_bits=0
no_mig_atomic=true
number_of_TBEs=256
recycle_latency=10
retry_threshold=1
ruby_system=system.ruby
send_evictions=false
sequencer=system.l1_cntrl0.sequencer
transitions_per_cycle=32
version=0
[system.l1_cntrl0.L1DcacheMemory]
type=RubyCache
assoc=2
is_icache=false
latency=2
replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl0.L1IcacheMemory]
type=RubyCache
assoc=2
is_icache=false
latency=2
replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl0.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl0.L1DcacheMemory
deadlock_threshold=500000
icache=system.l1_cntrl0.L1IcacheMemory
max_outstanding_requests=16
ruby_system=system.ruby
support_data_reqs=true
support_inst_reqs=true
system=system
using_network_tester=false
using_ruby_tester=true
version=0
slave=system.tester.cpuDataPort[0] system.tester.cpuInstPort[0]
[system.l2_cntrl0]
type=L2Cache_Controller
children=L2cacheMemory
L2cacheMemory=system.l2_cntrl0.L2cacheMemory
N_tokens=2
buffer_size=0
cntrl_id=1
filtering_enabled=true
l2_request_latency=5
l2_response_latency=5
number_of_TBEs=256
recycle_latency=10
ruby_system=system.ruby
transitions_per_cycle=32
version=0
[system.l2_cntrl0.L2cacheMemory]
type=RubyCache
assoc=2
is_icache=false
latency=10
replacement_policy=PSEUDO_LRU
size=512
start_index_bit=6
[system.physmem]
type=SimpleMemory
conf_table_reported=false
file=
in_addr_map=true
latency=30
latency_var=0
null=false
range=0:134217727
zero=false
[system.ruby]
type=RubySystem
children=network profiler
block_size_bytes=64
clock=1
mem_size=134217728
no_mem_vec=false
random_seed=1234
randomization=true
stats_filename=ruby.stats
[system.ruby.network]
type=SimpleNetwork
children=topology
adaptive_routing=false
buffer_size=0
control_msg_size=8
endpoint_bandwidth=1000
number_of_virtual_networks=10
ruby_system=system.ruby
topology=system.ruby.network.topology
[system.ruby.network.topology]
type=Topology
children=ext_links0 ext_links1 ext_links2 int_links0 int_links1 int_links2 routers0 routers1 routers2 routers3
description=Crossbar
ext_links=system.ruby.network.topology.ext_links0 system.ruby.network.topology.ext_links1 system.ruby.network.topology.ext_links2
int_links=system.ruby.network.topology.int_links0 system.ruby.network.topology.int_links1 system.ruby.network.topology.int_links2
print_config=false
routers=system.ruby.network.topology.routers0 system.ruby.network.topology.routers1 system.ruby.network.topology.routers2 system.ruby.network.topology.routers3
[system.ruby.network.topology.ext_links0]
type=SimpleExtLink
bandwidth_factor=16
ext_node=system.l1_cntrl0
int_node=system.ruby.network.topology.routers0
latency=1
link_id=0
weight=1
[system.ruby.network.topology.ext_links1]
type=SimpleExtLink
bandwidth_factor=16
ext_node=system.l2_cntrl0
int_node=system.ruby.network.topology.routers1
latency=1
link_id=1
weight=1
[system.ruby.network.topology.ext_links2]
type=SimpleExtLink
bandwidth_factor=16
ext_node=system.dir_cntrl0
int_node=system.ruby.network.topology.routers2
latency=1
link_id=2
weight=1
[system.ruby.network.topology.int_links0]
type=SimpleIntLink
bandwidth_factor=16
latency=1
link_id=3
node_a=system.ruby.network.topology.routers0
node_b=system.ruby.network.topology.routers3
weight=1
[system.ruby.network.topology.int_links1]
type=SimpleIntLink
bandwidth_factor=16
latency=1
link_id=4
node_a=system.ruby.network.topology.routers1
node_b=system.ruby.network.topology.routers3
weight=1
[system.ruby.network.topology.int_links2]
type=SimpleIntLink
bandwidth_factor=16
latency=1
link_id=5
node_a=system.ruby.network.topology.routers2
node_b=system.ruby.network.topology.routers3
weight=1
[system.ruby.network.topology.routers0]
type=BasicRouter
router_id=0
[system.ruby.network.topology.routers1]
type=BasicRouter
router_id=1
[system.ruby.network.topology.routers2]
type=BasicRouter
router_id=2
[system.ruby.network.topology.routers3]
type=BasicRouter
router_id=3
[system.ruby.profiler]
type=RubyProfiler
all_instructions=false
hot_lines=false
num_of_sequencers=1
ruby_system=system.ruby
[system.sys_port_proxy]
type=RubyPortProxy
access_phys_mem=true
ruby_system=system.ruby
support_data_reqs=true
support_inst_reqs=true
system=system
using_network_tester=false
using_ruby_tester=false
version=0
slave=system.system_port
[system.tester]
type=RubyTester
check_flush=false
checks_to_complete=100
deadlock_threshold=50000
num_cpus=1
system=system
wakeup_frequency=10
cpuDataPort=system.l1_cntrl0.sequencer.slave[0]
cpuInstPort=system.l1_cntrl0.sequencer.slave[1]

1049
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1
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@ -0,0 +1 @@
hack: be nice to actually delete the event here

10
simulators/gem5/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/simout Executable file
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@ -0,0 +1,10 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Jun 4 2012 11:56:32
gem5 started Jun 4 2012 14:43:05
gem5 executing on zizzer
command line: build/ALPHA_MOESI_CMP_token/gem5.opt -d build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_token -re tests/run.py build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_token
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Exiting @ tick 259241 because Ruby Tester completed

11
simulators/gem5/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/stats.txt Normal file
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@ -0,0 +1,11 @@
---------- Begin Simulation Statistics ----------
sim_seconds 0.000259 # Number of seconds simulated
sim_ticks 259241 # Number of ticks simulated
final_tick 259241 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
host_tick_rate 2053459 # Simulator tick rate (ticks/s)
host_mem_usage 221360 # Number of bytes of host memory used
host_seconds 0.13 # Real time elapsed on the host
---------- End Simulation Statistics ----------

267
simulators/gem5/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/config.ini Normal file
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[root]
type=Root
children=system
full_system=false
time_sync_enable=false
time_sync_period=100000000
time_sync_spin_threshold=100000
[system]
type=System
children=dir_cntrl0 l1_cntrl0 physmem ruby sys_port_proxy tester
boot_osflags=a
init_param=0
kernel=
load_addr_mask=1099511627775
mem_mode=timing
memories=system.physmem
num_work_ids=16
readfile=
symbolfile=
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
work_begin_exit_count=0
work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.sys_port_proxy.slave[0]
[system.dir_cntrl0]
type=Directory_Controller
children=directory memBuffer probeFilter
buffer_size=0
cntrl_id=1
directory=system.dir_cntrl0.directory
full_bit_dir_enabled=false
memBuffer=system.dir_cntrl0.memBuffer
memory_controller_latency=2
number_of_TBEs=256
probeFilter=system.dir_cntrl0.probeFilter
probe_filter_enabled=false
recycle_latency=10
ruby_system=system.ruby
transitions_per_cycle=32
version=0
[system.dir_cntrl0.directory]
type=RubyDirectoryMemory
map_levels=4
numa_high_bit=6
size=134217728
use_map=false
version=0
[system.dir_cntrl0.memBuffer]
type=RubyMemoryControl
bank_bit_0=8
bank_busy_time=11
bank_queue_size=12
banks_per_rank=8
basic_bus_busy_time=2
dimm_bit_0=12
dimms_per_channel=2
mem_bus_cycle_multiplier=10
mem_ctl_latency=12
mem_fixed_delay=0
mem_random_arbitrate=0
rank_bit_0=11
rank_rank_delay=1
ranks_per_dimm=2
read_write_delay=2
refresh_period=1560
tFaw=0
version=0
[system.dir_cntrl0.probeFilter]
type=RubyCache
assoc=4
is_icache=false
latency=1
replacement_policy=PSEUDO_LRU
size=1024
start_index_bit=6
[system.l1_cntrl0]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory L2cacheMemory sequencer
L1DcacheMemory=system.l1_cntrl0.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl0.L1IcacheMemory
L2cacheMemory=system.l1_cntrl0.L2cacheMemory
buffer_size=0
cache_response_latency=10
cntrl_id=0
issue_latency=2
l2_cache_hit_latency=10
no_mig_atomic=true
number_of_TBEs=256
recycle_latency=10
ruby_system=system.ruby
send_evictions=false
sequencer=system.l1_cntrl0.sequencer
transitions_per_cycle=32
version=0
[system.l1_cntrl0.L1DcacheMemory]
type=RubyCache
assoc=2
is_icache=false
latency=2
replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl0.L1IcacheMemory]
type=RubyCache
assoc=2
is_icache=true
latency=2
replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl0.L2cacheMemory]
type=RubyCache
assoc=2
is_icache=false
latency=10
replacement_policy=PSEUDO_LRU
size=512
start_index_bit=6
[system.l1_cntrl0.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl0.L1DcacheMemory
deadlock_threshold=500000
icache=system.l1_cntrl0.L1IcacheMemory
max_outstanding_requests=16
ruby_system=system.ruby
support_data_reqs=true
support_inst_reqs=true
system=system
using_network_tester=false
using_ruby_tester=true
version=0
slave=system.tester.cpuDataPort[0] system.tester.cpuInstPort[0]
[system.physmem]
type=SimpleMemory
conf_table_reported=false
file=
in_addr_map=true
latency=30
latency_var=0
null=false
range=0:134217727
zero=false
[system.ruby]
type=RubySystem
children=network profiler
block_size_bytes=64
clock=1
mem_size=134217728
no_mem_vec=false
random_seed=1234
randomization=true
stats_filename=ruby.stats
[system.ruby.network]
type=SimpleNetwork
children=topology
adaptive_routing=false
buffer_size=0
control_msg_size=8
endpoint_bandwidth=1000
number_of_virtual_networks=10
ruby_system=system.ruby
topology=system.ruby.network.topology
[system.ruby.network.topology]
type=Topology
children=ext_links0 ext_links1 int_links0 int_links1 routers0 routers1 routers2
description=Crossbar
ext_links=system.ruby.network.topology.ext_links0 system.ruby.network.topology.ext_links1
int_links=system.ruby.network.topology.int_links0 system.ruby.network.topology.int_links1
print_config=false
routers=system.ruby.network.topology.routers0 system.ruby.network.topology.routers1 system.ruby.network.topology.routers2
[system.ruby.network.topology.ext_links0]
type=SimpleExtLink
bandwidth_factor=16
ext_node=system.l1_cntrl0
int_node=system.ruby.network.topology.routers0
latency=1
link_id=0
weight=1
[system.ruby.network.topology.ext_links1]
type=SimpleExtLink
bandwidth_factor=16
ext_node=system.dir_cntrl0
int_node=system.ruby.network.topology.routers1
latency=1
link_id=1
weight=1
[system.ruby.network.topology.int_links0]
type=SimpleIntLink
bandwidth_factor=16
latency=1
link_id=2
node_a=system.ruby.network.topology.routers0
node_b=system.ruby.network.topology.routers2
weight=1
[system.ruby.network.topology.int_links1]
type=SimpleIntLink
bandwidth_factor=16
latency=1
link_id=3
node_a=system.ruby.network.topology.routers1
node_b=system.ruby.network.topology.routers2
weight=1
[system.ruby.network.topology.routers0]
type=BasicRouter
router_id=0
[system.ruby.network.topology.routers1]
type=BasicRouter
router_id=1
[system.ruby.network.topology.routers2]
type=BasicRouter
router_id=2
[system.ruby.profiler]
type=RubyProfiler
all_instructions=false
hot_lines=false
num_of_sequencers=1
ruby_system=system.ruby
[system.sys_port_proxy]
type=RubyPortProxy
access_phys_mem=true
ruby_system=system.ruby
support_data_reqs=true
support_inst_reqs=true
system=system
using_network_tester=false
using_ruby_tester=false
version=0
slave=system.system_port
[system.tester]
type=RubyTester
check_flush=true
checks_to_complete=100
deadlock_threshold=50000
num_cpus=1
system=system
wakeup_frequency=10
cpuDataPort=system.l1_cntrl0.sequencer.slave[0]
cpuInstPort=system.l1_cntrl0.sequencer.slave[1]

976
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================ Begin RubySystem Configuration Print ================
RubySystem config:
random_seed: 1234
randomization: 1
cycle_period: 1
block_size_bytes: 64
block_size_bits: 6
memory_size_bytes: 134217728
memory_size_bits: 27
Network Configuration
---------------------
network: SIMPLE_NETWORK
topology:
virtual_net_0: active, ordered
virtual_net_1: active, ordered
virtual_net_2: active, unordered
virtual_net_3: active, unordered
virtual_net_4: active, unordered
virtual_net_5: active, unordered
virtual_net_6: inactive
virtual_net_7: inactive
virtual_net_8: inactive
virtual_net_9: inactive
Profiler Configuration
----------------------
periodic_stats_period: 1000000
================ End RubySystem Configuration Print ================
Real time: Jun/04/2012 13:42:34
Profiler Stats
--------------
Elapsed_time_in_seconds: 0
Elapsed_time_in_minutes: 0
Elapsed_time_in_hours: 0
Elapsed_time_in_days: 0
Virtual_time_in_seconds: 0.32
Virtual_time_in_minutes: 0.00533333
Virtual_time_in_hours: 8.88889e-05
Virtual_time_in_days: 3.7037e-06
Ruby_current_time: 205611
Ruby_start_time: 0
Ruby_cycles: 205611
mbytes_resident: 43.1602
mbytes_total: 215.941
resident_ratio: 0.19987
ruby_cycles_executed: [ 205612 ]
Busy Controller Counts:
L1Cache-0:0
Directory-0:0
Busy Bank Count:0
sequencer_requests_outstanding: [binsize: 1 max: 16 count: 955 average: 15.8063 | standard deviation: 1.1547 | 0 1 1 1 1 1 1 1 1 1 1 1 1 1 2 64 876 ]
All Non-Zero Cycle Demand Cache Accesses
----------------------------------------
miss_latency: [binsize: 32 max: 5995 count: 940 average: 3454.8 | standard deviation: 1689.48 | 73 0 0 15 0 3 1 1 9 6 2 7 11 6 2 14 6 0 5 12 4 2 3 2 1 3 2 1 0 0 1 0 1 0 0 2 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 1 1 0 1 1 0 0 0 1 1 3 3 2 4 5 6 5 14 2 7 10 3 17 12 13 12 12 19 15 16 15 18 28 27 20 15 26 23 19 24 21 26 18 22 22 18 11 20 18 12 11 10 9 7 8 8 11 9 0 7 5 8 5 7 3 3 4 5 4 1 1 5 2 2 0 0 3 0 0 2 0 0 2 5 0 0 0 1 0 0 0 0 1 ]
miss_latency_LD: [binsize: 32 max: 5688 count: 51 average: 3691.18 | standard deviation: 1748.75 | 8 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 2 0 0 0 0 1 0 0 1 0 0 2 1 0 4 1 3 1 1 0 1 2 1 3 0 0 4 1 1 2 2 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 1 ]
miss_latency_ST: [binsize: 32 max: 5995 count: 837 average: 3617.77 | standard deviation: 1564.58 | 62 0 0 14 0 2 1 0 4 4 2 3 5 2 0 10 2 0 2 7 4 1 2 0 1 2 2 1 0 0 1 0 1 0 0 2 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 1 1 0 1 1 0 0 0 1 1 3 3 2 4 5 6 4 14 2 7 10 3 15 12 13 12 12 18 15 16 14 18 28 25 19 15 22 21 16 23 20 26 17 20 21 14 11 20 14 11 10 8 7 7 8 8 10 9 0 7 5 7 4 7 3 3 3 5 3 1 0 5 2 2 0 0 3 0 0 2 0 0 1 5 0 0 0 1 0 0 0 0 1 ]
miss_latency_IFETCH: [binsize: 8 max: 809 count: 49 average: 434 | standard deviation: 189.079 | 2 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 1 2 2 1 0 1 0 0 0 0 0 0 1 0 2 4 2 0 0 1 2 1 0 0 2 0 0 1 2 1 0 2 0 1 1 0 0 0 0 1 1 0 1 3 1 1 0 0 0 0 0 0 0 0 1 0 0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_FLUSH: [binsize: 32 max: 4507 count: 3 average: 3306 | standard deviation: 1853.78 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 ]
miss_latency_L1Cache: [binsize: 32 max: 4507 count: 81 average: 139.605 | standard deviation: 691.167 | 67 0 0 11 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 ]
miss_latency_L2Cache: [binsize: 32 max: 5708 count: 38 average: 2643.53 | standard deviation: 1886.57 | 6 0 0 4 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 0 0 0 0 0 1 1 0 0 1 0 0 2 0 0 0 1 0 0 0 0 1 1 1 1 1 1 0 2 1 1 1 1 0 1 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_Directory: [binsize: 32 max: 5995 count: 821 average: 3819.42 | standard deviation: 1346.15 | 0 0 0 0 0 3 1 1 9 5 2 7 11 5 2 14 6 0 5 11 4 2 3 2 1 3 2 1 0 0 1 0 1 0 0 2 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 2 2 2 4 4 6 5 12 2 7 10 2 17 12 13 12 11 18 14 15 14 17 28 25 19 14 25 21 19 23 21 26 18 22 22 16 11 20 18 12 11 10 8 7 8 8 11 9 0 7 5 8 5 7 3 3 4 5 4 1 1 5 2 2 0 0 3 0 0 2 0 0 2 4 0 0 0 1 0 0 0 0 1 ]
miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
imcomplete_wCC_Times: 0
miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
imcomplete_dir_Times: 821
miss_latency_LD_L1Cache: [binsize: 1 max: 4 count: 7 average: 2.42857 | standard deviation: 1 | 0 1 3 2 1 ]
miss_latency_LD_L2Cache: [binsize: 32 max: 4298 count: 2 average: 2152.5 | standard deviation: 3034.2 | 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
miss_latency_LD_Directory: [binsize: 32 max: 5688 count: 42 average: 4379.24 | standard deviation: 762.412 | 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 2 0 0 0 0 1 0 0 1 0 0 2 1 0 4 1 3 0 1 0 1 2 1 3 0 0 4 1 1 2 2 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 1 ]
miss_latency_ST_L1Cache: [binsize: 1 max: 118 count: 71 average: 19.338 | standard deviation: 39.1116 | 0 12 12 16 20 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 3 1 0 0 2 0 1 0 0 1 ]
miss_latency_ST_L2Cache: [binsize: 32 max: 5708 count: 32 average: 3000.47 | standard deviation: 1710.17 | 2 0 0 3 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 0 0 0 0 0 1 1 0 0 1 0 0 2 0 0 0 1 0 0 0 0 1 1 1 1 1 1 0 2 1 1 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_ST_Directory: [binsize: 32 max: 5995 count: 734 average: 3992.76 | standard deviation: 1120.88 | 0 0 0 0 0 2 1 0 4 3 2 3 5 1 0 10 2 0 2 6 4 1 2 0 1 2 2 1 0 0 1 0 1 0 0 2 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 2 2 2 4 4 6 4 12 2 7 10 2 15 12 13 12 11 17 14 15 13 17 28 23 18 14 21 20 16 23 20 26 17 20 21 13 11 20 14 11 10 8 6 7 8 8 10 9 0 7 5 7 4 7 3 3 3 5 3 1 0 5 2 2 0 0 3 0 0 2 0 0 1 4 0 0 0 1 0 0 0 0 1 ]
miss_latency_IFETCH_L2Cache: [binsize: 1 max: 115 count: 4 average: 33.5 | standard deviation: 54.3476 | 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
miss_latency_IFETCH_Directory: [binsize: 8 max: 809 count: 45 average: 469.6 | standard deviation: 151.399 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 1 2 2 1 0 1 0 0 0 0 0 0 1 0 2 4 2 0 0 1 2 1 0 0 2 0 0 1 2 1 0 2 0 1 1 0 0 0 0 1 1 0 1 3 1 1 0 0 0 0 0 0 0 0 1 0 0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_FLUSH_L1Cache: [binsize: 32 max: 4507 count: 3 average: 3306 | standard deviation: 1853.78 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 ]
All Non-Zero Cycle SW Prefetch Requests
------------------------------------
prefetch_latency: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
prefetch_latency_L2Miss:[binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
Request vs. RubySystem State Profile
--------------------------------
filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
Message Delayed Cycles
----------------------
Total_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
Total_nonPF_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_0_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_2_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_6_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_7_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_8_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_9_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
Resource Usage
--------------
page_size: 4096
user_time: 0
system_time: 0
page_reclaims: 11479
page_faults: 0
swaps: 0
block_inputs: 0
block_outputs: 80
Network Stats
-------------
total_msg_count_Request_Control: 2475 19800
total_msg_count_Response_Data: 2469 177768
total_msg_count_Writeback_Data: 2211 159192
total_msg_count_Writeback_Control: 5145 41160
total_msg_count_Unblock_Control: 2460 19680
total_msgs: 14760 total_bytes: 417600
switch_0_inlinks: 2
switch_0_outlinks: 2
links_utilized_percent_switch_0: 2.11565
links_utilized_percent_switch_0_link_0: 2.00014 bw: 16000 base_latency: 1
links_utilized_percent_switch_0_link_1: 2.23115 bw: 16000 base_latency: 1
outgoing_messages_switch_0_link_0_Response_Data: 823 59256 [ 0 0 0 0 823 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_0_Writeback_Control: 818 6544 [ 0 0 0 818 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_1_Request_Control: 825 6600 [ 0 0 825 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_1_Writeback_Data: 737 53064 [ 0 0 0 0 0 737 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_1_Writeback_Control: 897 7176 [ 0 0 817 0 0 80 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_1_Unblock_Control: 820 6560 [ 0 0 0 0 0 820 0 0 0 0 ] base_latency: 1
switch_1_inlinks: 2
switch_1_outlinks: 2
links_utilized_percent_switch_1: 2.11565
links_utilized_percent_switch_1_link_0: 2.23115 bw: 16000 base_latency: 1
links_utilized_percent_switch_1_link_1: 2.00014 bw: 16000 base_latency: 1
outgoing_messages_switch_1_link_0_Request_Control: 825 6600 [ 0 0 825 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_0_Writeback_Data: 737 53064 [ 0 0 0 0 0 737 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_0_Writeback_Control: 897 7176 [ 0 0 817 0 0 80 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_0_Unblock_Control: 820 6560 [ 0 0 0 0 0 820 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_1_Response_Data: 823 59256 [ 0 0 0 0 823 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_1_Writeback_Control: 818 6544 [ 0 0 0 818 0 0 0 0 0 0 ] base_latency: 1
switch_2_inlinks: 2
switch_2_outlinks: 2
links_utilized_percent_switch_2: 2.11565
links_utilized_percent_switch_2_link_0: 2.00014 bw: 16000 base_latency: 1
links_utilized_percent_switch_2_link_1: 2.23115 bw: 16000 base_latency: 1
outgoing_messages_switch_2_link_0_Response_Data: 823 59256 [ 0 0 0 0 823 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_0_Writeback_Control: 818 6544 [ 0 0 0 818 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_1_Request_Control: 825 6600 [ 0 0 825 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_1_Writeback_Data: 737 53064 [ 0 0 0 0 0 737 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_1_Writeback_Control: 897 7176 [ 0 0 817 0 0 80 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_1_Unblock_Control: 820 6560 [ 0 0 0 0 0 820 0 0 0 0 ] base_latency: 1
Cache Stats: system.l1_cntrl0.L1IcacheMemory
system.l1_cntrl0.L1IcacheMemory_total_misses: 49
system.l1_cntrl0.L1IcacheMemory_total_demand_misses: 49
system.l1_cntrl0.L1IcacheMemory_total_prefetches: 0
system.l1_cntrl0.L1IcacheMemory_total_sw_prefetches: 0
system.l1_cntrl0.L1IcacheMemory_total_hw_prefetches: 0
system.l1_cntrl0.L1IcacheMemory_request_type_IFETCH: 100%
system.l1_cntrl0.L1IcacheMemory_access_mode_type_Supervisor: 49 100%
Cache Stats: system.l1_cntrl0.L1DcacheMemory
system.l1_cntrl0.L1DcacheMemory_total_misses: 812
system.l1_cntrl0.L1DcacheMemory_total_demand_misses: 812
system.l1_cntrl0.L1DcacheMemory_total_prefetches: 0
system.l1_cntrl0.L1DcacheMemory_total_sw_prefetches: 0
system.l1_cntrl0.L1DcacheMemory_total_hw_prefetches: 0
system.l1_cntrl0.L1DcacheMemory_request_type_LD: 5.41872%
system.l1_cntrl0.L1DcacheMemory_request_type_ST: 94.4581%
system.l1_cntrl0.L1DcacheMemory_request_type_FLUSH: 0.123153%
system.l1_cntrl0.L1DcacheMemory_access_mode_type_Supervisor: 812 100%
Cache Stats: system.l1_cntrl0.L2cacheMemory
system.l1_cntrl0.L2cacheMemory_total_misses: 863
system.l1_cntrl0.L2cacheMemory_total_demand_misses: 863
system.l1_cntrl0.L2cacheMemory_total_prefetches: 0
system.l1_cntrl0.L2cacheMemory_total_sw_prefetches: 0
system.l1_cntrl0.L2cacheMemory_total_hw_prefetches: 0
system.l1_cntrl0.L2cacheMemory_request_type_LD: 5.09849%
system.l1_cntrl0.L2cacheMemory_request_type_ST: 88.876%
system.l1_cntrl0.L2cacheMemory_request_type_IFETCH: 5.67787%
system.l1_cntrl0.L2cacheMemory_request_type_FLUSH: 0.347625%
system.l1_cntrl0.L2cacheMemory_access_mode_type_Supervisor: 863 100%
--- L1Cache ---
- Event Counts -
Load [53 ] 53
Ifetch [49 ] 49
Store [861 ] 861
L2_Replacement [814 ] 814
L1_to_L2 [15927 ] 15927
Trigger_L2_to_L1D [35 ] 35
Trigger_L2_to_L1I [4 ] 4
Complete_L2_to_L1 [39 ] 39
Other_GETX [0 ] 0
Other_GETS [0 ] 0
Merged_GETS [0 ] 0
Other_GETS_No_Mig [0 ] 0
NC_DMA_GETS [0 ] 0
Invalidate [0 ] 0
Ack [0 ] 0
Shared_Ack [0 ] 0
Data [0 ] 0
Shared_Data [0 ] 0
Exclusive_Data [823 ] 823
Writeback_Ack [817 ] 817
Writeback_Nack [0 ] 0
All_acks [0 ] 0
All_acks_no_sharers [823 ] 823
Flush_line [3 ] 3
Block_Ack [1 ] 1
- Transitions -
I Load [42 ] 42
I Ifetch [45 ] 45
I Store [735 ] 735
I L2_Replacement [0 ] 0
I L1_to_L2 [0 ] 0
I Trigger_L2_to_L1D [0 ] 0
I Trigger_L2_to_L1I [0 ] 0
I Other_GETX [0 ] 0
I Other_GETS [0 ] 0
I Other_GETS_No_Mig [0 ] 0
I NC_DMA_GETS [0 ] 0
I Invalidate [0 ] 0
I Flush_line [2 ] 2
S Load [0 ] 0
S Ifetch [0 ] 0
S Store [0 ] 0
S L2_Replacement [0 ] 0
S L1_to_L2 [0 ] 0
S Trigger_L2_to_L1D [0 ] 0
S Trigger_L2_to_L1I [0 ] 0
S Other_GETX [0 ] 0
S Other_GETS [0 ] 0
S Other_GETS_No_Mig [0 ] 0
S NC_DMA_GETS [0 ] 0
S Invalidate [0 ] 0
S Flush_line [0 ] 0
O Load [0 ] 0
O Ifetch [0 ] 0
O Store [0 ] 0
O L2_Replacement [0 ] 0
O L1_to_L2 [0 ] 0
O Trigger_L2_to_L1D [0 ] 0
O Trigger_L2_to_L1I [0 ] 0
O Other_GETX [0 ] 0
O Other_GETS [0 ] 0
O Merged_GETS [0 ] 0
O Other_GETS_No_Mig [0 ] 0
O NC_DMA_GETS [0 ] 0
O Invalidate [0 ] 0
O Flush_line [0 ] 0
M Load [0 ] 0
M Ifetch [0 ] 0
M Store [0 ] 0
M L2_Replacement [78 ] 78
M L1_to_L2 [84 ] 84
M Trigger_L2_to_L1D [6 ] 6
M Trigger_L2_to_L1I [0 ] 0
M Other_GETX [0 ] 0
M Other_GETS [0 ] 0
M Merged_GETS [0 ] 0
M Other_GETS_No_Mig [0 ] 0
M NC_DMA_GETS [0 ] 0
M Invalidate [0 ] 0
M Flush_line [0 ] 0
MM Load [6 ] 6
MM Ifetch [0 ] 0
MM Store [69 ] 69
MM L2_Replacement [736 ] 736
MM L1_to_L2 [771 ] 771
MM Trigger_L2_to_L1D [29 ] 29
MM Trigger_L2_to_L1I [4 ] 4
MM Other_GETX [0 ] 0
MM Other_GETS [0 ] 0
MM Merged_GETS [0 ] 0
MM Other_GETS_No_Mig [0 ] 0
MM NC_DMA_GETS [0 ] 0
MM Invalidate [0 ] 0
MM Flush_line [0 ] 0
IR Load [0 ] 0
IR Ifetch [0 ] 0
IR Store [0 ] 0
IR L1_to_L2 [0 ] 0
IR Flush_line [0 ] 0
SR Load [0 ] 0
SR Ifetch [0 ] 0
SR Store [0 ] 0
SR L1_to_L2 [0 ] 0
SR Flush_line [0 ] 0
OR Load [0 ] 0
OR Ifetch [0 ] 0
OR Store [0 ] 0
OR L1_to_L2 [0 ] 0
OR Flush_line [0 ] 0
MR Load [0 ] 0
MR Ifetch [0 ] 0
MR Store [6 ] 6
MR L1_to_L2 [25 ] 25
MR Flush_line [0 ] 0
MMR Load [2 ] 2
MMR Ifetch [4 ] 4
MMR Store [26 ] 26
MMR L1_to_L2 [91 ] 91
MMR Flush_line [1 ] 1
IM Load [0 ] 0
IM Ifetch [0 ] 0
IM Store [0 ] 0
IM L2_Replacement [0 ] 0
IM L1_to_L2 [9582 ] 9582
IM Other_GETX [0 ] 0
IM Other_GETS [0 ] 0
IM Other_GETS_No_Mig [0 ] 0
IM NC_DMA_GETS [0 ] 0
IM Invalidate [0 ] 0
IM Ack [0 ] 0
IM Data [0 ] 0
IM Exclusive_Data [734 ] 734
IM Flush_line [0 ] 0
SM Load [0 ] 0
SM Ifetch [0 ] 0
SM Store [0 ] 0
SM L2_Replacement [0 ] 0
SM L1_to_L2 [0 ] 0
SM Other_GETX [0 ] 0
SM Other_GETS [0 ] 0
SM Other_GETS_No_Mig [0 ] 0
SM NC_DMA_GETS [0 ] 0
SM Invalidate [0 ] 0
SM Ack [0 ] 0
SM Data [0 ] 0
SM Exclusive_Data [0 ] 0
SM Flush_line [0 ] 0
OM Load [0 ] 0
OM Ifetch [0 ] 0
OM Store [0 ] 0
OM L2_Replacement [0 ] 0
OM L1_to_L2 [0 ] 0
OM Other_GETX [0 ] 0
OM Other_GETS [0 ] 0
OM Merged_GETS [0 ] 0
OM Other_GETS_No_Mig [0 ] 0
OM NC_DMA_GETS [0 ] 0
OM Invalidate [0 ] 0
OM Ack [0 ] 0
OM All_acks [0 ] 0
OM All_acks_no_sharers [0 ] 0
OM Flush_line [0 ] 0
ISM Load [0 ] 0
ISM Ifetch [0 ] 0
ISM Store [0 ] 0
ISM L2_Replacement [0 ] 0
ISM L1_to_L2 [0 ] 0
ISM Ack [0 ] 0
ISM All_acks_no_sharers [0 ] 0
ISM Flush_line [0 ] 0
M_W Load [0 ] 0
M_W Ifetch [0 ] 0
M_W Store [0 ] 0
M_W L2_Replacement [0 ] 0
M_W L1_to_L2 [253 ] 253
M_W Ack [0 ] 0
M_W All_acks_no_sharers [87 ] 87
M_W Flush_line [0 ] 0
MM_W Load [1 ] 1
MM_W Ifetch [0 ] 0
MM_W Store [2 ] 2
MM_W L2_Replacement [0 ] 0
MM_W L1_to_L2 [4505 ] 4505
MM_W Ack [0 ] 0
MM_W All_acks_no_sharers [734 ] 734
MM_W Flush_line [0 ] 0
IS Load [0 ] 0
IS Ifetch [0 ] 0
IS Store [0 ] 0
IS L2_Replacement [0 ] 0
IS L1_to_L2 [525 ] 525
IS Other_GETX [0 ] 0
IS Other_GETS [0 ] 0
IS Other_GETS_No_Mig [0 ] 0
IS NC_DMA_GETS [0 ] 0
IS Invalidate [0 ] 0
IS Ack [0 ] 0
IS Shared_Ack [0 ] 0
IS Data [0 ] 0
IS Shared_Data [0 ] 0
IS Exclusive_Data [87 ] 87
IS Flush_line [0 ] 0
SS Load [0 ] 0
SS Ifetch [0 ] 0
SS Store [0 ] 0
SS L2_Replacement [0 ] 0
SS L1_to_L2 [0 ] 0
SS Ack [0 ] 0
SS Shared_Ack [0 ] 0
SS All_acks [0 ] 0
SS All_acks_no_sharers [0 ] 0
SS Flush_line [0 ] 0
OI Load [0 ] 0
OI Ifetch [0 ] 0
OI Store [0 ] 0
OI L2_Replacement [0 ] 0
OI L1_to_L2 [0 ] 0
OI Other_GETX [0 ] 0
OI Other_GETS [0 ] 0
OI Merged_GETS [0 ] 0
OI Other_GETS_No_Mig [0 ] 0
OI NC_DMA_GETS [0 ] 0
OI Invalidate [0 ] 0
OI Writeback_Ack [0 ] 0
OI Flush_line [0 ] 0
MI Load [0 ] 0
MI Ifetch [0 ] 0
MI Store [2 ] 2
MI L2_Replacement [0 ] 0
MI L1_to_L2 [0 ] 0
MI Other_GETX [0 ] 0
MI Other_GETS [0 ] 0
MI Merged_GETS [0 ] 0
MI Other_GETS_No_Mig [0 ] 0
MI NC_DMA_GETS [0 ] 0
MI Invalidate [0 ] 0
MI Writeback_Ack [814 ] 814
MI Flush_line [0 ] 0
II Load [0 ] 0
II Ifetch [0 ] 0
II Store [0 ] 0
II L2_Replacement [0 ] 0
II L1_to_L2 [0 ] 0
II Other_GETX [0 ] 0
II Other_GETS [0 ] 0
II Other_GETS_No_Mig [0 ] 0
II NC_DMA_GETS [0 ] 0
II Invalidate [0 ] 0
II Writeback_Ack [0 ] 0
II Writeback_Nack [0 ] 0
II Flush_line [0 ] 0
IT Load [0 ] 0
IT Ifetch [0 ] 0
IT Store [0 ] 0
IT L2_Replacement [0 ] 0
IT L1_to_L2 [0 ] 0
IT Complete_L2_to_L1 [0 ] 0
ST Load [0 ] 0
ST Ifetch [0 ] 0
ST Store [0 ] 0
ST L2_Replacement [0 ] 0
ST L1_to_L2 [0 ] 0
ST Complete_L2_to_L1 [0 ] 0
OT Load [0 ] 0
OT Ifetch [0 ] 0
OT Store [0 ] 0
OT L2_Replacement [0 ] 0
OT L1_to_L2 [0 ] 0
OT Complete_L2_to_L1 [0 ] 0
MT Load [0 ] 0
MT Ifetch [0 ] 0
MT Store [1 ] 1
MT L2_Replacement [0 ] 0
MT L1_to_L2 [14 ] 14
MT Complete_L2_to_L1 [6 ] 6
MMT Load [2 ] 2
MMT Ifetch [0 ] 0
MMT Store [20 ] 20
MMT L2_Replacement [0 ] 0
MMT L1_to_L2 [77 ] 77
MMT Complete_L2_to_L1 [33 ] 33
MI_F Load [0 ] 0
MI_F Ifetch [0 ] 0
MI_F Store [0 ] 0
MI_F L1_to_L2 [0 ] 0
MI_F Writeback_Ack [3 ] 3
MI_F Flush_line [0 ] 0
MM_F Load [0 ] 0
MM_F Ifetch [0 ] 0
MM_F Store [0 ] 0
MM_F L1_to_L2 [0 ] 0
MM_F Other_GETX [0 ] 0
MM_F Other_GETS [0 ] 0
MM_F Merged_GETS [0 ] 0
MM_F Other_GETS_No_Mig [0 ] 0
MM_F NC_DMA_GETS [0 ] 0
MM_F Invalidate [0 ] 0
MM_F Ack [0 ] 0
MM_F All_acks [0 ] 0
MM_F All_acks_no_sharers [0 ] 0
MM_F Flush_line [0 ] 0
MM_F Block_Ack [1 ] 1
IM_F Load [0 ] 0
IM_F Ifetch [0 ] 0
IM_F Store [0 ] 0
IM_F L2_Replacement [0 ] 0
IM_F L1_to_L2 [0 ] 0
IM_F Other_GETX [0 ] 0
IM_F Other_GETS [0 ] 0
IM_F Other_GETS_No_Mig [0 ] 0
IM_F NC_DMA_GETS [0 ] 0
IM_F Invalidate [0 ] 0
IM_F Ack [0 ] 0
IM_F Data [0 ] 0
IM_F Exclusive_Data [2 ] 2
IM_F Flush_line [0 ] 0
ISM_F Load [0 ] 0
ISM_F Ifetch [0 ] 0
ISM_F Store [0 ] 0
ISM_F L2_Replacement [0 ] 0
ISM_F L1_to_L2 [0 ] 0
ISM_F Ack [0 ] 0
ISM_F All_acks_no_sharers [0 ] 0
ISM_F Flush_line [0 ] 0
SM_F Load [0 ] 0
SM_F Ifetch [0 ] 0
SM_F Store [0 ] 0
SM_F L2_Replacement [0 ] 0
SM_F L1_to_L2 [0 ] 0
SM_F Other_GETX [0 ] 0
SM_F Other_GETS [0 ] 0
SM_F Other_GETS_No_Mig [0 ] 0
SM_F NC_DMA_GETS [0 ] 0
SM_F Invalidate [0 ] 0
SM_F Ack [0 ] 0
SM_F Data [0 ] 0
SM_F Exclusive_Data [0 ] 0
SM_F Flush_line [0 ] 0
OM_F Load [0 ] 0
OM_F Ifetch [0 ] 0
OM_F Store [0 ] 0
OM_F L2_Replacement [0 ] 0
OM_F L1_to_L2 [0 ] 0
OM_F Other_GETX [0 ] 0
OM_F Other_GETS [0 ] 0
OM_F Merged_GETS [0 ] 0
OM_F Other_GETS_No_Mig [0 ] 0
OM_F NC_DMA_GETS [0 ] 0
OM_F Invalidate [0 ] 0
OM_F Ack [0 ] 0
OM_F All_acks [0 ] 0
OM_F All_acks_no_sharers [0 ] 0
OM_F Flush_line [0 ] 0
MM_WF Load [0 ] 0
MM_WF Ifetch [0 ] 0
MM_WF Store [0 ] 0
MM_WF L2_Replacement [0 ] 0
MM_WF L1_to_L2 [0 ] 0
MM_WF Ack [0 ] 0
MM_WF All_acks_no_sharers [2 ] 2
MM_WF Flush_line [0 ] 0
Cache Stats: system.dir_cntrl0.probeFilter
system.dir_cntrl0.probeFilter_total_misses: 0
system.dir_cntrl0.probeFilter_total_demand_misses: 0
system.dir_cntrl0.probeFilter_total_prefetches: 0
system.dir_cntrl0.probeFilter_total_sw_prefetches: 0
system.dir_cntrl0.probeFilter_total_hw_prefetches: 0
Memory controller: system.dir_cntrl0.memBuffer:
memory_total_requests: 1560
memory_reads: 824
memory_writes: 736
memory_refreshes: 429
memory_total_request_delays: 1115
memory_delays_per_request: 0.714744
memory_delays_in_input_queue: 138
memory_delays_behind_head_of_bank_queue: 10
memory_delays_stalled_at_head_of_bank_queue: 967
memory_stalls_for_bank_busy: 228
memory_stalls_for_random_busy: 0
memory_stalls_for_anti_starvation: 0
memory_stalls_for_arbitration: 72
memory_stalls_for_bus: 362
memory_stalls_for_tfaw: 0
memory_stalls_for_read_write_turnaround: 186
memory_stalls_for_read_read_turnaround: 119
accesses_per_bank: 47 55 53 77 82 53 68 47 52 57 48 52 53 45 30 61 44 37 47 47 54 41 43 45 39 47 27 43 41 34 39 52
--- Directory ---
- Event Counts -
GETX [735 ] 735
GETS [88 ] 88
PUT [864 ] 864
Unblock [0 ] 0
UnblockS [0 ] 0
UnblockM [820 ] 820
Writeback_Clean [0 ] 0
Writeback_Dirty [0 ] 0
Writeback_Exclusive_Clean [80 ] 80
Writeback_Exclusive_Dirty [736 ] 736
Pf_Replacement [0 ] 0
DMA_READ [0 ] 0
DMA_WRITE [0 ] 0
Memory_Data [823 ] 823
Memory_Ack [735 ] 735
Ack [0 ] 0
Shared_Ack [0 ] 0
Shared_Data [0 ] 0
Data [0 ] 0
Exclusive_Data [0 ] 0
All_acks_and_shared_data [0 ] 0
All_acks_and_owner_data [0 ] 0
All_acks_and_data_no_sharers [0 ] 0
All_Unblocks [0 ] 0
GETF [3 ] 3
PUTF [3 ] 3
- Transitions -
NX GETX [0 ] 0
NX GETS [0 ] 0
NX PUT [0 ] 0
NX Pf_Replacement [0 ] 0
NX DMA_READ [0 ] 0
NX DMA_WRITE [0 ] 0
NX GETF [0 ] 0
NO GETX [0 ] 0
NO GETS [0 ] 0
NO PUT [814 ] 814
NO Pf_Replacement [0 ] 0
NO DMA_READ [0 ] 0
NO DMA_WRITE [0 ] 0
NO GETF [1 ] 1
S GETX [0 ] 0
S GETS [0 ] 0
S PUT [0 ] 0
S Pf_Replacement [0 ] 0
S DMA_READ [0 ] 0
S DMA_WRITE [0 ] 0
S GETF [0 ] 0
O GETX [0 ] 0
O GETS [0 ] 0
O PUT [0 ] 0
O Pf_Replacement [0 ] 0
O DMA_READ [0 ] 0
O DMA_WRITE [0 ] 0
O GETF [0 ] 0
E GETX [735 ] 735
E GETS [87 ] 87
E PUT [0 ] 0
E DMA_READ [0 ] 0
E DMA_WRITE [0 ] 0
E GETF [2 ] 2
O_R GETX [0 ] 0
O_R GETS [0 ] 0
O_R PUT [0 ] 0
O_R Pf_Replacement [0 ] 0
O_R DMA_READ [0 ] 0
O_R DMA_WRITE [0 ] 0
O_R Ack [0 ] 0
O_R All_acks_and_data_no_sharers [0 ] 0
O_R GETF [0 ] 0
S_R GETX [0 ] 0
S_R GETS [0 ] 0
S_R PUT [0 ] 0
S_R Pf_Replacement [0 ] 0
S_R DMA_READ [0 ] 0
S_R DMA_WRITE [0 ] 0
S_R Ack [0 ] 0
S_R Data [0 ] 0
S_R All_acks_and_data_no_sharers [0 ] 0
S_R GETF [0 ] 0
NO_R GETX [0 ] 0
NO_R GETS [0 ] 0
NO_R PUT [0 ] 0
NO_R Pf_Replacement [0 ] 0
NO_R DMA_READ [0 ] 0
NO_R DMA_WRITE [0 ] 0
NO_R Ack [0 ] 0
NO_R Data [0 ] 0
NO_R Exclusive_Data [0 ] 0
NO_R All_acks_and_data_no_sharers [0 ] 0
NO_R GETF [0 ] 0
NO_B GETX [0 ] 0
NO_B GETS [0 ] 0
NO_B PUT [50 ] 50
NO_B UnblockS [0 ] 0
NO_B UnblockM [820 ] 820
NO_B Pf_Replacement [0 ] 0
NO_B DMA_READ [0 ] 0
NO_B DMA_WRITE [0 ] 0
NO_B GETF [0 ] 0
NO_B_X GETX [0 ] 0
NO_B_X GETS [0 ] 0
NO_B_X PUT [0 ] 0
NO_B_X UnblockS [0 ] 0
NO_B_X UnblockM [0 ] 0
NO_B_X Pf_Replacement [0 ] 0
NO_B_X DMA_READ [0 ] 0
NO_B_X DMA_WRITE [0 ] 0
NO_B_X GETF [0 ] 0
NO_B_S GETX [0 ] 0
NO_B_S GETS [0 ] 0
NO_B_S PUT [0 ] 0
NO_B_S UnblockS [0 ] 0
NO_B_S UnblockM [0 ] 0
NO_B_S Pf_Replacement [0 ] 0
NO_B_S DMA_READ [0 ] 0
NO_B_S DMA_WRITE [0 ] 0
NO_B_S GETF [0 ] 0
NO_B_S_W GETX [0 ] 0
NO_B_S_W GETS [0 ] 0
NO_B_S_W PUT [0 ] 0
NO_B_S_W UnblockS [0 ] 0
NO_B_S_W Pf_Replacement [0 ] 0
NO_B_S_W DMA_READ [0 ] 0
NO_B_S_W DMA_WRITE [0 ] 0
NO_B_S_W All_Unblocks [0 ] 0
NO_B_S_W GETF [0 ] 0
O_B GETX [0 ] 0
O_B GETS [0 ] 0
O_B PUT [0 ] 0
O_B UnblockS [0 ] 0
O_B UnblockM [0 ] 0
O_B Pf_Replacement [0 ] 0
O_B DMA_READ [0 ] 0
O_B DMA_WRITE [0 ] 0
O_B GETF [0 ] 0
NO_B_W GETX [0 ] 0
NO_B_W GETS [0 ] 0
NO_B_W PUT [0 ] 0
NO_B_W UnblockS [0 ] 0
NO_B_W UnblockM [0 ] 0
NO_B_W Pf_Replacement [0 ] 0
NO_B_W DMA_READ [0 ] 0
NO_B_W DMA_WRITE [0 ] 0
NO_B_W Memory_Data [821 ] 821
NO_B_W GETF [0 ] 0
O_B_W GETX [0 ] 0
O_B_W GETS [0 ] 0
O_B_W PUT [0 ] 0
O_B_W UnblockS [0 ] 0
O_B_W Pf_Replacement [0 ] 0
O_B_W DMA_READ [0 ] 0
O_B_W DMA_WRITE [0 ] 0
O_B_W Memory_Data [0 ] 0
O_B_W GETF [0 ] 0
NO_W GETX [0 ] 0
NO_W GETS [0 ] 0
NO_W PUT [0 ] 0
NO_W Pf_Replacement [0 ] 0
NO_W DMA_READ [0 ] 0
NO_W DMA_WRITE [0 ] 0
NO_W Memory_Data [0 ] 0
NO_W GETF [0 ] 0
O_W GETX [0 ] 0
O_W GETS [0 ] 0
O_W PUT [0 ] 0
O_W Pf_Replacement [0 ] 0
O_W DMA_READ [0 ] 0
O_W DMA_WRITE [0 ] 0
O_W Memory_Data [0 ] 0
O_W GETF [0 ] 0
NO_DW_B_W GETX [0 ] 0
NO_DW_B_W GETS [0 ] 0
NO_DW_B_W PUT [0 ] 0
NO_DW_B_W Pf_Replacement [0 ] 0
NO_DW_B_W DMA_READ [0 ] 0
NO_DW_B_W DMA_WRITE [0 ] 0
NO_DW_B_W Ack [0 ] 0
NO_DW_B_W Data [0 ] 0
NO_DW_B_W Exclusive_Data [0 ] 0
NO_DW_B_W All_acks_and_data_no_sharers [0 ] 0
NO_DW_B_W GETF [0 ] 0
NO_DR_B_W GETX [0 ] 0
NO_DR_B_W GETS [0 ] 0
NO_DR_B_W PUT [0 ] 0
NO_DR_B_W Pf_Replacement [0 ] 0
NO_DR_B_W DMA_READ [0 ] 0
NO_DR_B_W DMA_WRITE [0 ] 0
NO_DR_B_W Memory_Data [0 ] 0
NO_DR_B_W Ack [0 ] 0
NO_DR_B_W Shared_Ack [0 ] 0
NO_DR_B_W Shared_Data [0 ] 0
NO_DR_B_W Data [0 ] 0
NO_DR_B_W Exclusive_Data [0 ] 0
NO_DR_B_W GETF [0 ] 0
NO_DR_B_D GETX [0 ] 0
NO_DR_B_D GETS [0 ] 0
NO_DR_B_D PUT [0 ] 0
NO_DR_B_D Pf_Replacement [0 ] 0
NO_DR_B_D DMA_READ [0 ] 0
NO_DR_B_D DMA_WRITE [0 ] 0
NO_DR_B_D Ack [0 ] 0
NO_DR_B_D Shared_Ack [0 ] 0
NO_DR_B_D Shared_Data [0 ] 0
NO_DR_B_D Data [0 ] 0
NO_DR_B_D Exclusive_Data [0 ] 0
NO_DR_B_D All_acks_and_shared_data [0 ] 0
NO_DR_B_D All_acks_and_owner_data [0 ] 0
NO_DR_B_D All_acks_and_data_no_sharers [0 ] 0
NO_DR_B_D GETF [0 ] 0
NO_DR_B GETX [0 ] 0
NO_DR_B GETS [0 ] 0
NO_DR_B PUT [0 ] 0
NO_DR_B Pf_Replacement [0 ] 0
NO_DR_B DMA_READ [0 ] 0
NO_DR_B DMA_WRITE [0 ] 0
NO_DR_B Ack [0 ] 0
NO_DR_B Shared_Ack [0 ] 0
NO_DR_B Shared_Data [0 ] 0
NO_DR_B Data [0 ] 0
NO_DR_B Exclusive_Data [0 ] 0
NO_DR_B All_acks_and_shared_data [0 ] 0
NO_DR_B All_acks_and_owner_data [0 ] 0
NO_DR_B All_acks_and_data_no_sharers [0 ] 0
NO_DR_B GETF [0 ] 0
NO_DW_W GETX [0 ] 0
NO_DW_W GETS [0 ] 0
NO_DW_W PUT [0 ] 0
NO_DW_W Pf_Replacement [0 ] 0
NO_DW_W DMA_READ [0 ] 0
NO_DW_W DMA_WRITE [0 ] 0
NO_DW_W Memory_Ack [0 ] 0
NO_DW_W GETF [0 ] 0
O_DR_B_W GETX [0 ] 0
O_DR_B_W GETS [0 ] 0
O_DR_B_W PUT [0 ] 0
O_DR_B_W Pf_Replacement [0 ] 0
O_DR_B_W DMA_READ [0 ] 0
O_DR_B_W DMA_WRITE [0 ] 0
O_DR_B_W Memory_Data [0 ] 0
O_DR_B_W Ack [0 ] 0
O_DR_B_W Shared_Ack [0 ] 0
O_DR_B_W GETF [0 ] 0
O_DR_B GETX [0 ] 0
O_DR_B GETS [0 ] 0
O_DR_B PUT [0 ] 0
O_DR_B Pf_Replacement [0 ] 0
O_DR_B DMA_READ [0 ] 0
O_DR_B DMA_WRITE [0 ] 0
O_DR_B Ack [0 ] 0
O_DR_B Shared_Ack [0 ] 0
O_DR_B All_acks_and_owner_data [0 ] 0
O_DR_B All_acks_and_data_no_sharers [0 ] 0
O_DR_B GETF [0 ] 0
WB GETX [0 ] 0
WB GETS [1 ] 1
WB PUT [0 ] 0
WB Unblock [0 ] 0
WB Writeback_Clean [0 ] 0
WB Writeback_Dirty [0 ] 0
WB Writeback_Exclusive_Clean [80 ] 80
WB Writeback_Exclusive_Dirty [736 ] 736
WB Pf_Replacement [0 ] 0
WB DMA_READ [0 ] 0
WB DMA_WRITE [0 ] 0
WB GETF [0 ] 0
WB_O_W GETX [0 ] 0
WB_O_W GETS [0 ] 0
WB_O_W PUT [0 ] 0
WB_O_W Pf_Replacement [0 ] 0
WB_O_W DMA_READ [0 ] 0
WB_O_W DMA_WRITE [0 ] 0
WB_O_W Memory_Ack [0 ] 0
WB_O_W GETF [0 ] 0
WB_E_W GETX [0 ] 0
WB_E_W GETS [0 ] 0
WB_E_W PUT [0 ] 0
WB_E_W Pf_Replacement [0 ] 0
WB_E_W DMA_READ [0 ] 0
WB_E_W DMA_WRITE [0 ] 0
WB_E_W Memory_Ack [735 ] 735
WB_E_W GETF [0 ] 0
NO_F GETX [0 ] 0
NO_F GETS [0 ] 0
NO_F PUT [0 ] 0
NO_F UnblockM [0 ] 0
NO_F Pf_Replacement [0 ] 0
NO_F GETF [0 ] 0
NO_F PUTF [3 ] 3
NO_F_W GETX [0 ] 0
NO_F_W GETS [0 ] 0
NO_F_W PUT [0 ] 0
NO_F_W Pf_Replacement [0 ] 0
NO_F_W DMA_READ [0 ] 0
NO_F_W DMA_WRITE [0 ] 0
NO_F_W Memory_Data [2 ] 2
NO_F_W GETF [0 ] 0

1
simulators/gem5/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simerr Executable file
View File

@ -0,0 +1 @@
hack: be nice to actually delete the event here

10
simulators/gem5/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simout Executable file
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@ -0,0 +1,10 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Jun 4 2012 11:51:44
gem5 started Jun 4 2012 13:42:34
gem5 executing on zizzer
command line: build/ALPHA_MOESI_hammer/gem5.opt -d build/ALPHA_MOESI_hammer/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_hammer -re tests/run.py build/ALPHA_MOESI_hammer/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_hammer
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Exiting @ tick 205611 because Ruby Tester completed

11
simulators/gem5/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/stats.txt Normal file
View File

@ -0,0 +1,11 @@
---------- Begin Simulation Statistics ----------
sim_seconds 0.000206 # Number of seconds simulated
sim_ticks 205611 # Number of ticks simulated
final_tick 205611 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
host_tick_rate 2093129 # Simulator tick rate (ticks/s)
host_mem_usage 221128 # Number of bytes of host memory used
host_seconds 0.10 # Real time elapsed on the host
---------- End Simulation Statistics ----------

233
simulators/gem5/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/config.ini Normal file
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@ -0,0 +1,233 @@
[root]
type=Root
children=system
full_system=false
time_sync_enable=false
time_sync_period=100000000
time_sync_spin_threshold=100000
[system]
type=System
children=dir_cntrl0 l1_cntrl0 physmem ruby sys_port_proxy tester
boot_osflags=a
init_param=0
kernel=
load_addr_mask=1099511627775
mem_mode=timing
memories=system.physmem
num_work_ids=16
readfile=
symbolfile=
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
work_begin_exit_count=0
work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.sys_port_proxy.slave[0]
[system.dir_cntrl0]
type=Directory_Controller
children=directory memBuffer
buffer_size=0
cntrl_id=1
directory=system.dir_cntrl0.directory
directory_latency=12
memBuffer=system.dir_cntrl0.memBuffer
number_of_TBEs=256
recycle_latency=10
ruby_system=system.ruby
transitions_per_cycle=32
version=0
[system.dir_cntrl0.directory]
type=RubyDirectoryMemory
map_levels=4
numa_high_bit=6
size=134217728
use_map=false
version=0
[system.dir_cntrl0.memBuffer]
type=RubyMemoryControl
bank_bit_0=8
bank_busy_time=11
bank_queue_size=12
banks_per_rank=8
basic_bus_busy_time=2
dimm_bit_0=12
dimms_per_channel=2
mem_bus_cycle_multiplier=10
mem_ctl_latency=12
mem_fixed_delay=0
mem_random_arbitrate=0
rank_bit_0=11
rank_rank_delay=1
ranks_per_dimm=2
read_write_delay=2
refresh_period=1560
tFaw=0
version=0
[system.l1_cntrl0]
type=L1Cache_Controller
children=cacheMemory sequencer
buffer_size=0
cacheMemory=system.l1_cntrl0.cacheMemory
cache_response_latency=12
cntrl_id=0
issue_latency=2
number_of_TBEs=256
recycle_latency=10
ruby_system=system.ruby
send_evictions=false
sequencer=system.l1_cntrl0.sequencer
transitions_per_cycle=32
version=0
[system.l1_cntrl0.cacheMemory]
type=RubyCache
assoc=2
is_icache=false
latency=3
replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl0.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl0.cacheMemory
deadlock_threshold=500000
icache=system.l1_cntrl0.cacheMemory
max_outstanding_requests=16
ruby_system=system.ruby
support_data_reqs=true
support_inst_reqs=true
system=system
using_network_tester=false
using_ruby_tester=true
version=0
slave=system.tester.cpuDataPort[0] system.tester.cpuInstPort[0]
[system.physmem]
type=SimpleMemory
conf_table_reported=false
file=
in_addr_map=true
latency=30
latency_var=0
null=false
range=0:134217727
zero=false
[system.ruby]
type=RubySystem
children=network profiler
block_size_bytes=64
clock=1
mem_size=134217728
no_mem_vec=false
random_seed=1234
randomization=true
stats_filename=ruby.stats
[system.ruby.network]
type=SimpleNetwork
children=topology
adaptive_routing=false
buffer_size=0
control_msg_size=8
endpoint_bandwidth=1000
number_of_virtual_networks=10
ruby_system=system.ruby
topology=system.ruby.network.topology
[system.ruby.network.topology]
type=Topology
children=ext_links0 ext_links1 int_links0 int_links1 routers0 routers1 routers2
description=Crossbar
ext_links=system.ruby.network.topology.ext_links0 system.ruby.network.topology.ext_links1
int_links=system.ruby.network.topology.int_links0 system.ruby.network.topology.int_links1
print_config=false
routers=system.ruby.network.topology.routers0 system.ruby.network.topology.routers1 system.ruby.network.topology.routers2
[system.ruby.network.topology.ext_links0]
type=SimpleExtLink
bandwidth_factor=16
ext_node=system.l1_cntrl0
int_node=system.ruby.network.topology.routers0
latency=1
link_id=0
weight=1
[system.ruby.network.topology.ext_links1]
type=SimpleExtLink
bandwidth_factor=16
ext_node=system.dir_cntrl0
int_node=system.ruby.network.topology.routers1
latency=1
link_id=1
weight=1
[system.ruby.network.topology.int_links0]
type=SimpleIntLink
bandwidth_factor=16
latency=1
link_id=2
node_a=system.ruby.network.topology.routers0
node_b=system.ruby.network.topology.routers2
weight=1
[system.ruby.network.topology.int_links1]
type=SimpleIntLink
bandwidth_factor=16
latency=1
link_id=3
node_a=system.ruby.network.topology.routers1
node_b=system.ruby.network.topology.routers2
weight=1
[system.ruby.network.topology.routers0]
type=BasicRouter
router_id=0
[system.ruby.network.topology.routers1]
type=BasicRouter
router_id=1
[system.ruby.network.topology.routers2]
type=BasicRouter
router_id=2
[system.ruby.profiler]
type=RubyProfiler
all_instructions=false
hot_lines=false
num_of_sequencers=1
ruby_system=system.ruby
[system.sys_port_proxy]
type=RubyPortProxy
access_phys_mem=true
ruby_system=system.ruby
support_data_reqs=true
support_inst_reqs=true
system=system
using_network_tester=false
using_ruby_tester=false
version=0
slave=system.system_port
[system.tester]
type=RubyTester
check_flush=false
checks_to_complete=100
deadlock_threshold=50000
num_cpus=1
system=system
wakeup_frequency=10
cpuDataPort=system.l1_cntrl0.sequencer.slave[0]
cpuInstPort=system.l1_cntrl0.sequencer.slave[1]

310
simulators/gem5/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/ruby.stats Normal file
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================ Begin RubySystem Configuration Print ================
RubySystem config:
random_seed: 1234
randomization: 1
cycle_period: 1
block_size_bytes: 64
block_size_bits: 6
memory_size_bytes: 134217728
memory_size_bits: 27
Network Configuration
---------------------
network: SIMPLE_NETWORK
topology:
virtual_net_0: active, ordered
virtual_net_1: active, ordered
virtual_net_2: active, ordered
virtual_net_3: active, ordered
virtual_net_4: active, ordered
virtual_net_5: inactive
virtual_net_6: inactive
virtual_net_7: inactive
virtual_net_8: inactive
virtual_net_9: inactive
Profiler Configuration
----------------------
periodic_stats_period: 1000000
================ End RubySystem Configuration Print ================
Real time: Jun/04/2012 13:52:42
Profiler Stats
--------------
Elapsed_time_in_seconds: 0
Elapsed_time_in_minutes: 0
Elapsed_time_in_hours: 0
Elapsed_time_in_days: 0
Virtual_time_in_seconds: 0.28
Virtual_time_in_minutes: 0.00466667
Virtual_time_in_hours: 7.77778e-05
Virtual_time_in_days: 3.24074e-06
Ruby_current_time: 280571
Ruby_start_time: 0
Ruby_cycles: 280571
mbytes_resident: 43.0117
mbytes_total: 215.34
resident_ratio: 0.199739
ruby_cycles_executed: [ 280572 ]
Busy Controller Counts:
L1Cache-0:0
Directory-0:0
Busy Bank Count:0
sequencer_requests_outstanding: [binsize: 1 max: 16 count: 1000 average: 15.774 | standard deviation: 1.14469 | 0 1 1 1 1 1 1 1 1 1 1 1 1 1 8 93 886 ]
All Non-Zero Cycle Demand Cache Accesses
----------------------------------------
miss_latency: [binsize: 32 max: 6185 count: 986 average: 4512.83 | standard deviation: 564.917 | 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 2 0 2 0 1 1 1 0 3 0 1 1 2 5 4 6 5 8 7 2 12 9 11 7 16 19 21 19 24 15 26 28 20 22 22 30 33 30 27 30 31 27 29 27 19 18 31 35 23 21 29 18 15 18 17 12 17 5 13 10 2 9 7 5 6 6 5 5 6 4 1 2 3 1 1 0 3 1 4 3 0 1 0 1 4 2 0 0 1 1 0 0 1 ]
miss_latency_LD: [binsize: 32 max: 5593 count: 43 average: 4526 | standard deviation: 440.983 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1 0 2 2 2 1 1 1 1 1 0 1 1 0 3 1 0 1 1 2 2 1 0 2 1 1 1 2 0 1 1 0 1 0 0 1 1 0 0 0 0 0 0 0 0 2 0 0 0 0 1 ]
miss_latency_ST: [binsize: 32 max: 6185 count: 886 average: 4517.13 | standard deviation: 578.837 | 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 2 0 2 0 1 1 1 0 2 0 1 1 2 5 4 6 4 6 4 2 12 9 10 5 15 13 17 16 20 14 20 25 18 21 19 29 32 26 25 26 30 26 26 25 16 17 28 32 21 17 25 17 14 15 16 11 17 5 9 8 2 9 7 5 6 5 5 5 4 4 1 2 3 0 1 0 3 1 4 3 0 1 0 1 4 2 0 0 1 1 0 0 1 ]
miss_latency_IFETCH: [binsize: 32 max: 5314 count: 57 average: 4436.05 | standard deviation: 407.417 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 3 0 0 0 0 1 1 4 2 1 3 0 5 2 1 1 2 0 1 1 1 4 0 0 1 0 2 1 1 2 1 3 2 1 0 2 1 0 0 0 3 1 0 0 0 0 0 1 ]
miss_latency_L1Cache: [binsize: 32 max: 5682 count: 39 average: 3989.69 | standard deviation: 543.603 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1 0 1 1 1 0 2 0 0 1 0 2 1 1 2 1 1 0 3 1 0 0 0 0 1 2 0 0 0 2 1 2 0 1 0 0 2 0 1 0 0 0 1 0 2 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
miss_latency_Directory: [binsize: 32 max: 6185 count: 947 average: 4534.38 | standard deviation: 555.581 | 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 0 0 0 1 0 1 0 2 3 3 5 3 7 6 2 9 8 11 7 16 19 20 17 24 15 26 26 19 20 22 29 33 30 25 30 30 27 29 27 18 18 29 35 23 21 29 18 15 18 17 11 17 5 13 10 2 9 7 5 6 6 5 5 6 4 1 2 3 1 1 0 2 1 4 3 0 1 0 1 4 2 0 0 1 1 0 0 1 ]
miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
imcomplete_wCC_Times: 0
miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
imcomplete_dir_Times: 947
miss_latency_LD_Directory: [binsize: 32 max: 5593 count: 43 average: 4526 | standard deviation: 440.983 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1 0 2 2 2 1 1 1 1 1 0 1 1 0 3 1 0 1 1 2 2 1 0 2 1 1 1 2 0 1 1 0 1 0 0 1 1 0 0 0 0 0 0 0 0 2 0 0 0 0 1 ]
miss_latency_ST_L1Cache: [binsize: 32 max: 5682 count: 37 average: 4008.19 | standard deviation: 551.275 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1 0 1 1 1 0 1 0 0 1 0 2 1 1 2 0 1 0 3 1 0 0 0 0 1 2 0 0 0 2 1 2 0 1 0 0 2 0 1 0 0 0 1 0 2 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
miss_latency_ST_Directory: [binsize: 32 max: 6185 count: 849 average: 4539.31 | standard deviation: 570.066 | 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 0 0 0 1 0 1 0 2 3 3 5 2 6 3 2 9 8 10 5 15 13 16 14 20 14 20 23 17 19 19 28 32 26 23 26 29 26 26 25 15 17 26 32 21 17 25 17 14 15 16 10 17 5 9 8 2 9 7 5 6 5 5 5 4 4 1 2 3 0 1 0 2 1 4 3 0 1 0 1 4 2 0 0 1 1 0 0 1 ]
miss_latency_IFETCH_L1Cache: [binsize: 32 max: 3792 count: 2 average: 3647.5 | standard deviation: 204.355 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 ]
miss_latency_IFETCH_Directory: [binsize: 32 max: 5314 count: 55 average: 4464.73 | standard deviation: 384.051 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 0 0 0 0 1 1 4 2 1 3 0 5 2 1 1 2 0 1 1 1 4 0 0 1 0 2 1 1 2 1 3 2 1 0 2 1 0 0 0 3 1 0 0 0 0 0 1 ]
All Non-Zero Cycle SW Prefetch Requests
------------------------------------
prefetch_latency: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
prefetch_latency_L2Miss:[binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
Request vs. RubySystem State Profile
--------------------------------
filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
Message Delayed Cycles
----------------------
Total_delay_cycles: [binsize: 1 max: 8 count: 1890 average: 0.140212 | standard deviation: 0.700147 | 1792 21 32 25 7 8 1 1 3 ]
Total_nonPF_delay_cycles: [binsize: 1 max: 8 count: 1890 average: 0.140212 | standard deviation: 0.700147 | 1792 21 32 25 7 8 1 1 3 ]
virtual_network_0_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_1_delay_cycles: [binsize: 1 max: 8 count: 947 average: 0.198522 | standard deviation: 0.78638 | 871 19 27 18 5 5 0 0 2 ]
virtual_network_2_delay_cycles: [binsize: 1 max: 8 count: 943 average: 0.0816543 | standard deviation: 0.596344 | 921 2 5 7 2 3 1 1 1 ]
virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_6_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_7_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_8_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_9_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
Resource Usage
--------------
page_size: 4096
user_time: 0
system_time: 0
page_reclaims: 11376
page_faults: 5
swaps: 0
block_inputs: 432
block_outputs: 80
Network Stats
-------------
total_msg_count_Control: 2841 22728
total_msg_count_Data: 2833 203976
total_msg_count_Response_Data: 2841 204552
total_msg_count_Writeback_Control: 2829 22632
total_msgs: 11344 total_bytes: 453888
switch_0_inlinks: 2
switch_0_outlinks: 2
links_utilized_percent_switch_0: 1.68505
links_utilized_percent_switch_0_link_0: 1.68692 bw: 16000 base_latency: 1
links_utilized_percent_switch_0_link_1: 1.68317 bw: 16000 base_latency: 1
outgoing_messages_switch_0_link_0_Response_Data: 947 68184 [ 0 0 0 0 947 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_0_Writeback_Control: 943 7544 [ 0 0 0 943 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_1_Control: 947 7576 [ 0 0 947 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_1_Data: 945 68040 [ 0 0 945 0 0 0 0 0 0 0 ] base_latency: 1
switch_1_inlinks: 2
switch_1_outlinks: 2
links_utilized_percent_switch_1: 1.68487
links_utilized_percent_switch_1_link_0: 1.68282 bw: 16000 base_latency: 1
links_utilized_percent_switch_1_link_1: 1.68692 bw: 16000 base_latency: 1
outgoing_messages_switch_1_link_0_Control: 947 7576 [ 0 0 947 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_0_Data: 944 67968 [ 0 0 944 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_1_Response_Data: 947 68184 [ 0 0 0 0 947 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_1_Writeback_Control: 943 7544 [ 0 0 0 943 0 0 0 0 0 0 ] base_latency: 1
switch_2_inlinks: 2
switch_2_outlinks: 2
links_utilized_percent_switch_2: 1.68487
links_utilized_percent_switch_2_link_0: 1.68692 bw: 16000 base_latency: 1
links_utilized_percent_switch_2_link_1: 1.68282 bw: 16000 base_latency: 1
outgoing_messages_switch_2_link_0_Response_Data: 947 68184 [ 0 0 0 0 947 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_0_Writeback_Control: 943 7544 [ 0 0 0 943 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_1_Control: 947 7576 [ 0 0 947 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_1_Data: 944 67968 [ 0 0 944 0 0 0 0 0 0 0 ] base_latency: 1
Cache Stats: system.l1_cntrl0.cacheMemory
system.l1_cntrl0.cacheMemory_total_misses: 949
system.l1_cntrl0.cacheMemory_total_demand_misses: 949
system.l1_cntrl0.cacheMemory_total_prefetches: 0
system.l1_cntrl0.cacheMemory_total_sw_prefetches: 0
system.l1_cntrl0.cacheMemory_total_hw_prefetches: 0
system.l1_cntrl0.cacheMemory_request_type_LD: 4.63646%
system.l1_cntrl0.cacheMemory_request_type_ST: 89.568%
system.l1_cntrl0.cacheMemory_request_type_IFETCH: 5.79557%
system.l1_cntrl0.cacheMemory_access_mode_type_Supervisor: 949 100%
--- L1Cache ---
- Event Counts -
Load [44 ] 44
Ifetch [57 ] 57
Store [887 ] 887
Data [947 ] 947
Fwd_GETX [0 ] 0
Inv [0 ] 0
Replacement [946 ] 946
Writeback_Ack [943 ] 943
Writeback_Nack [0 ] 0
- Transitions -
I Load [44 ] 44
I Ifetch [55 ] 55
I Store [850 ] 850
I Inv [0 ] 0
I Replacement [0 ] 0
II Writeback_Nack [0 ] 0
M Load [0 ] 0
M Ifetch [2 ] 2
M Store [37 ] 37
M Fwd_GETX [0 ] 0
M Inv [0 ] 0
M Replacement [946 ] 946
MI Fwd_GETX [0 ] 0
MI Inv [0 ] 0
MI Writeback_Ack [943 ] 943
MI Writeback_Nack [0 ] 0
MII Fwd_GETX [0 ] 0
IS Data [98 ] 98
IM Data [849 ] 849
Memory controller: system.dir_cntrl0.memBuffer:
memory_total_requests: 1891
memory_reads: 947
memory_writes: 944
memory_refreshes: 585
memory_total_request_delays: 2814
memory_delays_per_request: 1.4881
memory_delays_in_input_queue: 676
memory_delays_behind_head_of_bank_queue: 12
memory_delays_stalled_at_head_of_bank_queue: 2126
memory_stalls_for_bank_busy: 294
memory_stalls_for_random_busy: 0
memory_stalls_for_anti_starvation: 0
memory_stalls_for_arbitration: 265
memory_stalls_for_bus: 935
memory_stalls_for_tfaw: 0
memory_stalls_for_read_write_turnaround: 518
memory_stalls_for_read_read_turnaround: 114
accesses_per_bank: 46 50 40 88 149 74 58 50 50 48 58 62 54 60 56 58 60 62 54 54 63 54 56 44 54 77 52 48 46 62 46 58
--- Directory ---
- Event Counts -
GETX [947 ] 947
GETS [0 ] 0
PUTX [944 ] 944
PUTX_NotOwner [0 ] 0
DMA_READ [0 ] 0
DMA_WRITE [0 ] 0
Memory_Data [947 ] 947
Memory_Ack [944 ] 944
- Transitions -
I GETX [947 ] 947
I PUTX_NotOwner [0 ] 0
I DMA_READ [0 ] 0
I DMA_WRITE [0 ] 0
M GETX [0 ] 0
M PUTX [944 ] 944
M PUTX_NotOwner [0 ] 0
M DMA_READ [0 ] 0
M DMA_WRITE [0 ] 0
M_DRD GETX [0 ] 0
M_DRD PUTX [0 ] 0
M_DWR GETX [0 ] 0
M_DWR PUTX [0 ] 0
M_DWRI GETX [0 ] 0
M_DWRI Memory_Ack [0 ] 0
M_DRDI GETX [0 ] 0
M_DRDI Memory_Ack [0 ] 0
IM GETX [0 ] 0
IM GETS [0 ] 0
IM PUTX [0 ] 0
IM PUTX_NotOwner [0 ] 0
IM DMA_READ [0 ] 0
IM DMA_WRITE [0 ] 0
IM Memory_Data [947 ] 947
MI GETX [0 ] 0
MI GETS [0 ] 0
MI PUTX [0 ] 0
MI PUTX_NotOwner [0 ] 0
MI DMA_READ [0 ] 0
MI DMA_WRITE [0 ] 0
MI Memory_Ack [944 ] 944
ID GETX [0 ] 0
ID GETS [0 ] 0
ID PUTX [0 ] 0
ID PUTX_NotOwner [0 ] 0
ID DMA_READ [0 ] 0
ID DMA_WRITE [0 ] 0
ID Memory_Data [0 ] 0
ID_W GETX [0 ] 0
ID_W GETS [0 ] 0
ID_W PUTX [0 ] 0
ID_W PUTX_NotOwner [0 ] 0
ID_W DMA_READ [0 ] 0
ID_W DMA_WRITE [0 ] 0
ID_W Memory_Ack [0 ] 0

1
simulators/gem5/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/simerr Executable file
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hack: be nice to actually delete the event here

10
simulators/gem5/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/simout Executable file
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gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Jun 4 2012 11:50:11
gem5 started Jun 4 2012 13:52:42
gem5 executing on zizzer
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby -re tests/run.py build/ALPHA/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Exiting @ tick 280571 because Ruby Tester completed

11
simulators/gem5/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/stats.txt Normal file
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---------- Begin Simulation Statistics ----------
sim_seconds 0.000281 # Number of seconds simulated
sim_ticks 280571 # Number of ticks simulated
final_tick 280571 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
host_tick_rate 3251259 # Simulator tick rate (ticks/s)
host_mem_usage 220512 # Number of bytes of host memory used
host_seconds 0.09 # Real time elapsed on the host
---------- End Simulation Statistics ----------

29
simulators/gem5/tests/quick/se/60.rubytest/test.py Normal file
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# Copyright (c) 2010 Advanced Micro Devices, Inc.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Ron Dreslinski