Adding gem5 source to svn.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1819 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
This commit is contained in:
friemel
553
simulators/gem5/src/sim/pseudo_inst.cc
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553
simulators/gem5/src/sim/pseudo_inst.cc
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@ -0,0 +1,553 @@
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/*
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* Copyright (c) 2010-2011 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
|
||||
* not be construed as granting a license to any other intellectual
|
||||
* property including but not limited to intellectual property relating
|
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
|
||||
* terms below provided that you ensure that this notice is replicated
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||||
* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Copyright (c) 2011 Advanced Micro Devices, Inc.
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* Copyright (c) 2003-2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are
|
||||
* met: redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer;
|
||||
* redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution;
|
||||
* neither the name of the copyright holders nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
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||||
*
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||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Nathan Binkert
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*/
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#include <fcntl.h>
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#include <unistd.h>
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#include <cerrno>
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#include <fstream>
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#include <string>
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#include "arch/kernel_stats.hh"
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#include "arch/vtophys.hh"
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#include "base/debug.hh"
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#include "base/output.hh"
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#include "config/the_isa.hh"
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#include "cpu/base.hh"
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#include "cpu/quiesce_event.hh"
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#include "cpu/thread_context.hh"
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#include "debug/Loader.hh"
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#include "debug/Quiesce.hh"
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#include "debug/WorkItems.hh"
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#include "params/BaseCPU.hh"
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#include "sim/full_system.hh"
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#include "sim/pseudo_inst.hh"
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#include "sim/serialize.hh"
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#include "sim/sim_events.hh"
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#include "sim/sim_exit.hh"
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#include "sim/stat_control.hh"
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#include "sim/stats.hh"
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#include "sim/system.hh"
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#include "sim/vptr.hh"
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using namespace std;
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using namespace Stats;
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using namespace TheISA;
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namespace PseudoInst {
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static inline void
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panicFsOnlyPseudoInst(const char *name)
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{
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panic("Pseudo inst \"%s\" is only available in Full System mode.");
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}
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void
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arm(ThreadContext *tc)
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{
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if (!FullSystem)
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panicFsOnlyPseudoInst("arm");
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if (tc->getKernelStats())
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tc->getKernelStats()->arm();
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}
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void
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quiesce(ThreadContext *tc)
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{
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if (!FullSystem)
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panicFsOnlyPseudoInst("quiesce");
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if (!tc->getCpuPtr()->params()->do_quiesce)
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return;
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DPRINTF(Quiesce, "%s: quiesce()\n", tc->getCpuPtr()->name());
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tc->suspend();
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if (tc->getKernelStats())
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tc->getKernelStats()->quiesce();
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}
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void
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quiesceSkip(ThreadContext *tc)
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{
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if (!FullSystem)
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panicFsOnlyPseudoInst("quiesceSkip");
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BaseCPU *cpu = tc->getCpuPtr();
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if (!cpu->params()->do_quiesce)
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return;
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EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
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Tick resume = curTick() + 1;
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cpu->reschedule(quiesceEvent, resume, true);
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DPRINTF(Quiesce, "%s: quiesceSkip() until %d\n",
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cpu->name(), resume);
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tc->suspend();
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if (tc->getKernelStats())
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tc->getKernelStats()->quiesce();
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}
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void
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quiesceNs(ThreadContext *tc, uint64_t ns)
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{
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if (!FullSystem)
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panicFsOnlyPseudoInst("quiesceNs");
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BaseCPU *cpu = tc->getCpuPtr();
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if (!cpu->params()->do_quiesce || ns == 0)
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return;
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EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
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Tick resume = curTick() + SimClock::Int::ns * ns;
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cpu->reschedule(quiesceEvent, resume, true);
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DPRINTF(Quiesce, "%s: quiesceNs(%d) until %d\n",
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cpu->name(), ns, resume);
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tc->suspend();
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if (tc->getKernelStats())
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tc->getKernelStats()->quiesce();
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}
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void
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quiesceCycles(ThreadContext *tc, uint64_t cycles)
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{
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if (!FullSystem)
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panicFsOnlyPseudoInst("quiesceCycles");
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BaseCPU *cpu = tc->getCpuPtr();
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if (!cpu->params()->do_quiesce || cycles == 0)
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return;
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EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
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Tick resume = curTick() + cpu->ticks(cycles);
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cpu->reschedule(quiesceEvent, resume, true);
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DPRINTF(Quiesce, "%s: quiesceCycles(%d) until %d\n",
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cpu->name(), cycles, resume);
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tc->suspend();
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if (tc->getKernelStats())
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tc->getKernelStats()->quiesce();
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}
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uint64_t
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quiesceTime(ThreadContext *tc)
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{
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if (!FullSystem) {
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panicFsOnlyPseudoInst("quiesceTime");
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return 0;
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}
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return (tc->readLastActivate() - tc->readLastSuspend()) /
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SimClock::Int::ns;
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}
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uint64_t
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rpns(ThreadContext *tc)
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{
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return curTick() / SimClock::Int::ns;
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}
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void
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wakeCPU(ThreadContext *tc, uint64_t cpuid)
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{
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System *sys = tc->getSystemPtr();
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ThreadContext *other_tc = sys->threadContexts[cpuid];
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if (other_tc->status() == ThreadContext::Suspended)
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other_tc->activate();
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}
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void
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m5exit(ThreadContext *tc, Tick delay)
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{
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Tick when = curTick() + delay * SimClock::Int::ns;
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exitSimLoop("m5_exit instruction encountered", 0, when);
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}
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void
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loadsymbol(ThreadContext *tc)
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{
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if (!FullSystem)
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panicFsOnlyPseudoInst("loadsymbol");
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const string &filename = tc->getCpuPtr()->system->params()->symbolfile;
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if (filename.empty()) {
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return;
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}
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std::string buffer;
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ifstream file(filename.c_str());
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if (!file)
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fatal("file error: Can't open symbol table file %s\n", filename);
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while (!file.eof()) {
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getline(file, buffer);
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if (buffer.empty())
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continue;
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string::size_type idx = buffer.find(' ');
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if (idx == string::npos)
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continue;
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string address = "0x" + buffer.substr(0, idx);
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eat_white(address);
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if (address.empty())
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continue;
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// Skip over letter and space
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string symbol = buffer.substr(idx + 3);
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eat_white(symbol);
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if (symbol.empty())
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continue;
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Addr addr;
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if (!to_number(address, addr))
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continue;
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if (!tc->getSystemPtr()->kernelSymtab->insert(addr, symbol))
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continue;
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DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
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}
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file.close();
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}
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void
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addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr)
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{
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if (!FullSystem)
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panicFsOnlyPseudoInst("addSymbol");
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char symb[100];
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CopyStringOut(tc, symb, symbolAddr, 100);
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std::string symbol(symb);
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DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
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tc->getSystemPtr()->kernelSymtab->insert(addr,symbol);
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debugSymbolTable->insert(addr,symbol);
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}
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uint64_t
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initParam(ThreadContext *tc)
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{
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if (!FullSystem) {
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panicFsOnlyPseudoInst("initParam");
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return 0;
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}
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return tc->getCpuPtr()->system->init_param;
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}
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void
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resetstats(ThreadContext *tc, Tick delay, Tick period)
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{
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if (!tc->getCpuPtr()->params()->do_statistics_insts)
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return;
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Tick when = curTick() + delay * SimClock::Int::ns;
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Tick repeat = period * SimClock::Int::ns;
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Stats::schedStatEvent(false, true, when, repeat);
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}
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void
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dumpstats(ThreadContext *tc, Tick delay, Tick period)
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{
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if (!tc->getCpuPtr()->params()->do_statistics_insts)
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return;
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Tick when = curTick() + delay * SimClock::Int::ns;
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Tick repeat = period * SimClock::Int::ns;
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Stats::schedStatEvent(true, false, when, repeat);
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}
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void
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dumpresetstats(ThreadContext *tc, Tick delay, Tick period)
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{
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if (!tc->getCpuPtr()->params()->do_statistics_insts)
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return;
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Tick when = curTick() + delay * SimClock::Int::ns;
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Tick repeat = period * SimClock::Int::ns;
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Stats::schedStatEvent(true, true, when, repeat);
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}
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void
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m5checkpoint(ThreadContext *tc, Tick delay, Tick period)
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{
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if (!tc->getCpuPtr()->params()->do_checkpoint_insts)
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return;
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Tick when = curTick() + delay * SimClock::Int::ns;
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Tick repeat = period * SimClock::Int::ns;
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exitSimLoop("checkpoint", 0, when, repeat);
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}
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uint64_t
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readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset)
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{
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if (!FullSystem) {
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panicFsOnlyPseudoInst("readfile");
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return 0;
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}
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const string &file = tc->getSystemPtr()->params()->readfile;
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if (file.empty()) {
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return ULL(0);
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}
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uint64_t result = 0;
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int fd = ::open(file.c_str(), O_RDONLY, 0);
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if (fd < 0)
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panic("could not open file %s\n", file);
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if (::lseek(fd, offset, SEEK_SET) < 0)
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panic("could not seek: %s", strerror(errno));
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|
||||
char *buf = new char[len];
|
||||
char *p = buf;
|
||||
while (len > 0) {
|
||||
int bytes = ::read(fd, p, len);
|
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if (bytes <= 0)
|
||||
break;
|
||||
|
||||
p += bytes;
|
||||
result += bytes;
|
||||
len -= bytes;
|
||||
}
|
||||
|
||||
close(fd);
|
||||
CopyIn(tc, vaddr, buf, result);
|
||||
delete [] buf;
|
||||
return result;
|
||||
}
|
||||
|
||||
uint64_t
|
||||
writefile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset,
|
||||
Addr filename_addr)
|
||||
{
|
||||
ostream *os;
|
||||
|
||||
// copy out target filename
|
||||
char fn[100];
|
||||
std::string filename;
|
||||
CopyStringOut(tc, fn, filename_addr, 100);
|
||||
filename = std::string(fn);
|
||||
|
||||
if (offset == 0) {
|
||||
// create a new file (truncate)
|
||||
os = simout.create(filename, true);
|
||||
} else {
|
||||
// do not truncate file if offset is non-zero
|
||||
// (ios::in flag is required as well to keep the existing data
|
||||
// intact, otherwise existing data will be zeroed out.)
|
||||
os = simout.openFile(simout.directory() + filename,
|
||||
ios::in | ios::out | ios::binary);
|
||||
}
|
||||
if (!os)
|
||||
panic("could not open file %s\n", filename);
|
||||
|
||||
// seek to offset
|
||||
os->seekp(offset);
|
||||
|
||||
// copy out data and write to file
|
||||
char *buf = new char[len];
|
||||
CopyOut(tc, buf, vaddr, len);
|
||||
os->write(buf, len);
|
||||
if (os->fail() || os->bad())
|
||||
panic("Error while doing writefile!\n");
|
||||
|
||||
simout.close(os);
|
||||
|
||||
delete [] buf;
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
void
|
||||
debugbreak(ThreadContext *tc)
|
||||
{
|
||||
Debug::breakpoint();
|
||||
}
|
||||
|
||||
void
|
||||
switchcpu(ThreadContext *tc)
|
||||
{
|
||||
exitSimLoop("switchcpu");
|
||||
}
|
||||
|
||||
//
|
||||
// This function is executed when annotated work items begin. Depending on
|
||||
// what the user specified at the command line, the simulation may exit and/or
|
||||
// take a checkpoint when a certain work item begins.
|
||||
//
|
||||
void
|
||||
workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid)
|
||||
{
|
||||
tc->getCpuPtr()->workItemBegin();
|
||||
System *sys = tc->getSystemPtr();
|
||||
const System::Params *params = sys->params();
|
||||
sys->workItemBegin(threadid, workid);
|
||||
|
||||
DPRINTF(WorkItems, "Work Begin workid: %d, threadid %d\n", workid,
|
||||
threadid);
|
||||
|
||||
//
|
||||
// If specified, determine if this is the specific work item the user
|
||||
// identified
|
||||
//
|
||||
if (params->work_item_id == -1 || params->work_item_id == workid) {
|
||||
|
||||
uint64_t systemWorkBeginCount = sys->incWorkItemsBegin();
|
||||
int cpuId = tc->getCpuPtr()->cpuId();
|
||||
|
||||
if (params->work_cpus_ckpt_count != 0 &&
|
||||
sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) {
|
||||
//
|
||||
// If active cpus equals checkpoint count, create checkpoint
|
||||
//
|
||||
exitSimLoop("checkpoint");
|
||||
}
|
||||
|
||||
if (systemWorkBeginCount == params->work_begin_ckpt_count) {
|
||||
//
|
||||
// Note: the string specified as the cause of the exit event must
|
||||
// exactly equal "checkpoint" inorder to create a checkpoint
|
||||
//
|
||||
exitSimLoop("checkpoint");
|
||||
}
|
||||
|
||||
if (systemWorkBeginCount == params->work_begin_exit_count) {
|
||||
//
|
||||
// If a certain number of work items started, exit simulation
|
||||
//
|
||||
exitSimLoop("work started count reach");
|
||||
}
|
||||
|
||||
if (cpuId == params->work_begin_cpu_id_exit) {
|
||||
//
|
||||
// If work started on the cpu id specified, exit simulation
|
||||
//
|
||||
exitSimLoop("work started on specific cpu");
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// This function is executed when annotated work items end. Depending on
|
||||
// what the user specified at the command line, the simulation may exit and/or
|
||||
// take a checkpoint when a certain work item ends.
|
||||
//
|
||||
void
|
||||
workend(ThreadContext *tc, uint64_t workid, uint64_t threadid)
|
||||
{
|
||||
tc->getCpuPtr()->workItemEnd();
|
||||
System *sys = tc->getSystemPtr();
|
||||
const System::Params *params = sys->params();
|
||||
sys->workItemEnd(threadid, workid);
|
||||
|
||||
DPRINTF(WorkItems, "Work End workid: %d, threadid %d\n", workid, threadid);
|
||||
|
||||
//
|
||||
// If specified, determine if this is the specific work item the user
|
||||
// identified
|
||||
//
|
||||
if (params->work_item_id == -1 || params->work_item_id == workid) {
|
||||
|
||||
uint64_t systemWorkEndCount = sys->incWorkItemsEnd();
|
||||
int cpuId = tc->getCpuPtr()->cpuId();
|
||||
|
||||
if (params->work_cpus_ckpt_count != 0 &&
|
||||
sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) {
|
||||
//
|
||||
// If active cpus equals checkpoint count, create checkpoint
|
||||
//
|
||||
exitSimLoop("checkpoint");
|
||||
}
|
||||
|
||||
if (params->work_end_ckpt_count != 0 &&
|
||||
systemWorkEndCount == params->work_end_ckpt_count) {
|
||||
//
|
||||
// If total work items completed equals checkpoint count, create
|
||||
// checkpoint
|
||||
//
|
||||
exitSimLoop("checkpoint");
|
||||
}
|
||||
|
||||
if (params->work_end_exit_count != 0 &&
|
||||
systemWorkEndCount == params->work_end_exit_count) {
|
||||
//
|
||||
// If total work items completed equals exit count, exit simulation
|
||||
//
|
||||
exitSimLoop("work items exit count reached");
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
} // namespace PseudoInst
|
||||
Reference in New Issue
Block a user