Adding gem5 source to svn.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1819 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
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simulators/gem5/src/sim/faults.cc
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77
simulators/gem5/src/sim/faults.cc
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/*
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* Copyright (c) 2003-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Nathan Binkert
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* Gabe Black
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*/
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#include "arch/isa_traits.hh"
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#include "base/misc.hh"
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#include "cpu/base.hh"
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#include "cpu/thread_context.hh"
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#include "debug/Fault.hh"
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#include "mem/page_table.hh"
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#include "sim/faults.hh"
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#include "sim/full_system.hh"
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#include "sim/process.hh"
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void FaultBase::invoke(ThreadContext * tc, StaticInstPtr inst)
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{
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if (FullSystem) {
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DPRINTF(Fault, "Fault %s at PC: %s\n", name(), tc->pcState());
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assert(!tc->misspeculating());
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} else {
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panic("fault (%s) detected @ PC %s", name(), tc->pcState());
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}
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}
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void UnimpFault::invoke(ThreadContext * tc, StaticInstPtr inst)
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{
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panic("Unimpfault: %s\n", panicStr.c_str());
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}
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void ReExec::invoke(ThreadContext *tc, StaticInstPtr inst)
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{
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tc->pcState(tc->pcState());
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}
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void GenericPageTableFault::invoke(ThreadContext *tc, StaticInstPtr inst)
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{
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bool handled = false;
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if (!FullSystem) {
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Process *p = tc->getProcessPtr();
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handled = p->fixupStackFault(vaddr);
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}
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if (!handled)
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panic("Page table fault when accessing virtual address %#x\n", vaddr);
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}
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void GenericAlignmentFault::invoke(ThreadContext *tc, StaticInstPtr inst)
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{
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panic("Alignment fault when accessing virtual address %#x\n", vaddr);
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}
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