Adding gem5 source to svn.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1819 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
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friemel
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simulators/gem5/src/python/m5/simulate.py
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233
simulators/gem5/src/python/m5/simulate.py
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# Copyright (c) 2012 ARM Limited
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# All rights reserved.
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#
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# The license below extends only to copyright in the software and shall
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# not be construed as granting a license to any other intellectual
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# property including but not limited to intellectual property relating
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# to a hardware implementation of the functionality of the software
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# licensed hereunder. You may use the software subject to the license
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# terms below provided that you ensure that this notice is replicated
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# unmodified and in its entirety in all distributions of the software,
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# modified or unmodified, in source code or in binary form.
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#
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# Copyright (c) 2005 The Regents of The University of Michigan
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# Copyright (c) 2010 Advanced Micro Devices, Inc.
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Authors: Nathan Binkert
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# Steve Reinhardt
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import atexit
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import os
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import sys
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# import the SWIG-wrapped main C++ functions
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import internal
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import core
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import stats
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import SimObject
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import ticks
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import objects
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from m5.util.dot_writer import do_dot
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from util import fatal
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from util import attrdict
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# define a MaxTick parameter
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MaxTick = 2**63 - 1
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# The final hook to generate .ini files. Called from the user script
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# once the config is built.
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def instantiate(ckpt_dir=None):
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from m5 import options
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root = objects.Root.getInstance()
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if not root:
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fatal("Need to instantiate Root() before calling instantiate()")
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# we need to fix the global frequency
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ticks.fixGlobalFrequency()
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# Make sure SimObject-valued params are in the configuration
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# hierarchy so we catch them with future descendants() walks
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for obj in root.descendants(): obj.adoptOrphanParams()
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# Unproxy in sorted order for determinism
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for obj in root.descendants(): obj.unproxyParams()
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if options.dump_config:
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ini_file = file(os.path.join(options.outdir, options.dump_config), 'w')
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# Print ini sections in sorted order for easier diffing
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for obj in sorted(root.descendants(), key=lambda o: o.path()):
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obj.print_ini(ini_file)
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ini_file.close()
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if options.json_config:
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try:
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import json
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json_file = file(os.path.join(options.outdir, options.json_config), 'w')
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d = root.get_config_as_dict()
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json.dump(d, json_file, indent=4)
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json_file.close()
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except ImportError:
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pass
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do_dot(root, options.outdir, options.dot_config)
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# Initialize the global statistics
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stats.initSimStats()
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# Create the C++ sim objects and connect ports
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for obj in root.descendants(): obj.createCCObject()
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for obj in root.descendants(): obj.connectPorts()
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# Do a second pass to finish initializing the sim objects
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for obj in root.descendants(): obj.init()
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# Do a third pass to initialize statistics
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for obj in root.descendants(): obj.regStats()
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for obj in root.descendants(): obj.regFormulas()
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# We're done registering statistics. Enable the stats package now.
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stats.enable()
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# Restore checkpoint (if any)
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if ckpt_dir:
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ckpt = internal.core.getCheckpoint(ckpt_dir)
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internal.core.unserializeGlobals(ckpt);
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for obj in root.descendants(): obj.loadState(ckpt)
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need_resume.append(root)
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else:
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for obj in root.descendants(): obj.initState()
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# Reset to put the stats in a consistent state.
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stats.reset()
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need_resume = []
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need_startup = True
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def simulate(*args, **kwargs):
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global need_resume, need_startup
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if need_startup:
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root = objects.Root.getInstance()
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for obj in root.descendants(): obj.startup()
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need_startup = False
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for root in need_resume:
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resume(root)
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need_resume = []
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return internal.event.simulate(*args, **kwargs)
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# Export curTick to user script.
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def curTick():
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return internal.core.curTick()
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# Python exit handlers happen in reverse order. We want to dump stats last.
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atexit.register(stats.dump)
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# register our C++ exit callback function with Python
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atexit.register(internal.core.doExitCleanup)
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# This loops until all objects have been fully drained.
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def doDrain(root):
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all_drained = drain(root)
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while (not all_drained):
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all_drained = drain(root)
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# Tries to drain all objects. Draining might not be completed unless
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# all objects return that they are drained on the first call. This is
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# because as objects drain they may cause other objects to no longer
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# be drained.
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def drain(root):
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all_drained = False
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drain_event = internal.event.createCountedDrain()
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unready_objs = sum(obj.drain(drain_event) for obj in root.descendants())
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# If we've got some objects that can't drain immediately, then simulate
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if unready_objs > 0:
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drain_event.setCount(unready_objs)
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simulate()
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else:
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all_drained = True
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internal.event.cleanupCountedDrain(drain_event)
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return all_drained
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def resume(root):
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for obj in root.descendants(): obj.resume()
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def checkpoint(dir):
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root = objects.Root.getInstance()
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if not isinstance(root, objects.Root):
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raise TypeError, "Checkpoint must be called on a root object."
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doDrain(root)
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print "Writing checkpoint"
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internal.core.serializeAll(dir)
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resume(root)
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def changeToAtomic(system):
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if not isinstance(system, (objects.Root, objects.System)):
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raise TypeError, "Parameter of type '%s'. Must be type %s or %s." % \
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(type(system), objects.Root, objects.System)
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if system.getMemoryMode() != objects.params.atomic:
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doDrain(system)
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print "Changing memory mode to atomic"
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for obj in system.descendants():
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obj.changeTiming(objects.params.atomic)
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def changeToTiming(system):
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if not isinstance(system, (objects.Root, objects.System)):
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raise TypeError, "Parameter of type '%s'. Must be type %s or %s." % \
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(type(system), objects.Root, objects.System)
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if system.getMemoryMode() != objects.params.timing:
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doDrain(system)
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print "Changing memory mode to timing"
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for obj in system.descendants():
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obj.changeTiming(objects.params.timing)
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def switchCpus(cpuList):
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print "switching cpus"
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if not isinstance(cpuList, list):
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raise RuntimeError, "Must pass a list to this function"
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for item in cpuList:
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if not isinstance(item, tuple) or len(item) != 2:
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raise RuntimeError, "List must have tuples of (oldCPU,newCPU)"
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for old_cpu, new_cpu in cpuList:
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if not isinstance(old_cpu, objects.BaseCPU):
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raise TypeError, "%s is not of type BaseCPU" % old_cpu
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if not isinstance(new_cpu, objects.BaseCPU):
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raise TypeError, "%s is not of type BaseCPU" % new_cpu
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# Now all of the CPUs are ready to be switched out
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for old_cpu, new_cpu in cpuList:
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old_cpu._ccObject.switchOut()
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for old_cpu, new_cpu in cpuList:
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new_cpu.takeOverFrom(old_cpu)
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from internal.core import disableAllListeners
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