Adding gem5 source to svn.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1819 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
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simulators/gem5/src/cpu/decode_cache.hh
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129
simulators/gem5/src/cpu/decode_cache.hh
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/*
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* Copyright (c) 2011 Google
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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*/
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#ifndef __CPU_DECODE_CACHE_HH__
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#define __CPU_DECODE_CACHE_HH__
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#include "arch/isa_traits.hh"
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#include "arch/types.hh"
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#include "base/hashmap.hh"
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#include "config/the_isa.hh"
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#include "cpu/static_inst_fwd.hh"
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namespace TheISA
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{
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class Decoder;
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}
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namespace DecodeCache
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{
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/// Hash for decoded instructions.
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typedef m5::hash_map<TheISA::ExtMachInst, StaticInstPtr> InstMap;
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/// A sparse map from an Addr to a Value, stored in page chunks.
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template<class Value>
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class AddrMap
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{
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protected:
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// A pages worth of cache entries.
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struct CachePage {
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Value items[TheISA::PageBytes];
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};
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// A map of cache pages which allows a sparse mapping.
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typedef typename m5::hash_map<Addr, CachePage *> PageMap;
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typedef typename PageMap::iterator PageIt;
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// Mini cache of recent lookups.
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PageIt recent[2];
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PageMap pageMap;
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/// Update the mini cache of recent lookups.
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/// @param recentest The most recent result;
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void
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update(PageIt recentest)
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{
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recent[1] = recent[0];
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recent[0] = recentest;
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}
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/// Attempt to find the CacheePage which goes with a particular
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/// address. First check the small cache of recent results, then
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/// actually look in the hash_map.
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/// @param addr The address to look up.
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CachePage *
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getPage(Addr addr)
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{
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Addr page_addr = addr & ~(TheISA::PageBytes - 1);
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// Check against recent lookups.
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if (recent[0] != pageMap.end()) {
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if (recent[0]->first == page_addr)
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return recent[0]->second;
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if (recent[1] != pageMap.end() &&
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recent[1]->first == page_addr) {
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update(recent[1]);
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// recent[1] has just become recent[0].
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return recent[0]->second;
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}
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}
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// Actually look in the has_map.
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PageIt it = pageMap.find(page_addr);
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if (it != pageMap.end()) {
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update(it);
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return it->second;
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}
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// Didn't find an existing page, so add a new one.
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CachePage *newPage = new CachePage;
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page_addr = page_addr & ~(TheISA::PageBytes - 1);
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typename PageMap::value_type to_insert(page_addr, newPage);
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update(pageMap.insert(to_insert).first);
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return newPage;
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}
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public:
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/// Constructor
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AddrMap()
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{
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recent[0] = recent[1] = pageMap.end();
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}
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Value &
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lookup(Addr addr)
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{
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CachePage *page = getPage(addr);
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return page->items[addr & (TheISA::PageBytes - 1)];
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}
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};
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} // namespace DecodeCache
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#endif // __CPU_DECODE_CACHE_HH__
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