christoph/fail
1
Fork 0
Code Releases Activity

Revisited breakpoint implementation of gem5.

Browse Source 
Now, the gem5 implementation equals the Bochs variant. Note that its
necessary to enable CONFIG_EVENTS_BREAKPOINTS_RANGE in order to use
range breakpoints.
In addition, gem5 distinguishes between macro- and microops. With the
new implemenation, onBreakpoint is only called when a macroop changes.

Change-Id: Ib86d1802fc70c20d22ca1a1ece0e8d1221b2e7db
This commit is contained in:
Adrian Böckenkamp
2013-04-24 13:06:44 +02:00
parent f364024cba
commit a3cafbd78b
5 changed files with 8 additions and 81 deletions
Download Patch File Download Diff File Expand all files Collapse all files

14
simulators/gem5/src/cpu/simple/base.cc
View File

@ -377,12 +377,6 @@ BaseSimpleCPU::preExecute()
TheISA::PCState pcState = thread->pcState();
// FAIL*
#if defined(CONFIG_EVENT_BREAKPOINTS) && defined(CONFIG_EVENT_BREAKPOINTS_RANGE)
fail::ConcreteCPU* cpu = &fail::simulator.getCPU(cpuId());
fail::simulator.onBreakpoint(cpu, instAddr(), -1);
#endif
if (isRomMicroPC(pcState.microPC())) {
stayAtPC = false;
curStaticInst = microcodeRom.fetchMicroop(pcState.microPC(),
@ -406,6 +400,14 @@ BaseSimpleCPU::preExecute()
//Decode an instruction if one is ready. Otherwise, we'll have to
//fetch beyond the MachInst at the current pc.
instPtr = decoder->decode(pcState);
// FAIL*
#if defined(CONFIG_EVENT_BREAKPOINTS) || defined(CONFIG_EVENT_BREAKPOINTS_RANGE)
fail::ConcreteCPU* cpu = &fail::simulator.getCPU(cpuId());
fail::simulator.setMnemonic(instPtr->getName());
fail::simulator.onBreakpoint(cpu, instAddr(), -1);
#endif
if (instPtr) {
stayAtPC = false;
thread->pcState(pcState);

18
src/core/sal/gem5/Gem5Breakpoint.hpp
View File

@ -1,18 +0,0 @@
#ifndef __GEM5_BREAKPOINT_HPP__
#define __GEM5_BREAKPOINT_HPP__
#include "../SALConfig.hpp"
#include "cpu/pc_event.hh"
namespace fail {
class Gem5Breakpoint : public PCEvent {
public:
Gem5Breakpoint(PCEventQueue* queue, Addr ip)
: PCEvent(queue, "Fail* experiment breakpoint", ip) { }
virtual void process(ThreadContext *tc);
};
} // end-of-namespace: fail
#endif // __GEM5_BREAKPOINT_HPP__

29
src/core/sal/gem5/Gem5Listener.ah
View File

@ -1,29 +0,0 @@
#ifndef __GEM5_LISTENER_AH__
#define __GEM5_LISTENER_AH__
#include "config/FailConfig.hpp"
#include "config/VariantConfig.hpp"
#if defined(BUILD_GEM5) && defined(CONFIG_EVENT_BREAKPOINTS) && !defined(CONFIG_EVENT_BREAKPOINTS_RANGE)
aspect Gem5Listener {
advice "fail::BPSingleListener" : slice class {
private:
Gem5Breakpoint* m_Breakpoint;
public:
virtual bool onAddition()
{
m_Breakpoint = OnBreakpointAddition(Gem5Breakpoint* bp, address_t watchInstrPtr)
return true;
}
virtual void onDeletion()
{
OnBreakpointDeletion(m_Breakpoint);
m_Breakpoint = 0;
}
};
};
#endif // defined(BUILD_GEM5) && defined(CONFIG_EVENT_BREAKPOINTS) && !defined(CONFIG_EVENT_BREAKPOINTS_RANGE)
#endif // __GEM5_LISTENER_AH__

22
src/core/sal/gem5/Gem5Wrapper.cc
View File

@ -1,6 +1,5 @@
#include "../SALInst.hpp"
#include "Gem5Wrapper.hpp"
#include "Gem5Breakpoint.hpp"
#include "sim/system.hh"
#include "mem/packet.hh"
@ -61,27 +60,6 @@ void WriteMemory(System* sys, guest_address_t addr, size_t cnt, void const *src)
size_t GetPoolSize(System* sys) { return sys->getPhysMem().totalSize(); }
// Breakpoint-related:
void Gem5Breakpoint::process(ThreadContext *tc)
{
fail::simulator.onBreakpoint(&fail::simulator.getCPU(tc->cpuId()), this->evpc, fail::ANY_ADDR);
}
Gem5Breakpoint* OnBreakpointAddition(address_t watchInstrPtr)
{
System* sys = *System::systemList.begin();
// FIXME: begin() vs. front() (see Gem5Controller::startup())
// FIXME: Provide "sys" using the simulator-inst?
return new Gem5Breakpoint(&sys->pcEventQueue, watchInstrPtr);
}
void OnBreakpointDeletion(Gem5Breakpoint* bp)
{
if (bp) {
delete bp; // TODO: required?
}
}
// Controller-related:
unsigned int GetCPUId(System* sys, int context)
{

6
src/core/sal/gem5/Gem5Wrapper.hpp
View File

@ -9,8 +9,6 @@ class System;
namespace fail {
class Gem5Breakpoint;
// Register-/Memory-related:
regdata_t GetRegisterContent(System* sys, unsigned int id, RegisterType type, size_t idx);
void SetRegisterContent(System* sys, unsigned int id, RegisterType type, size_t idx,
@ -19,10 +17,6 @@ void WriteMemory(System* sys, guest_address_t addr, size_t cnt, void const *src)
void ReadMemory(System* sys, guest_address_t addr, size_t cnt, void *dest);
size_t GetPoolSize(System* sys);
// Breakpoint-related:
Gem5Breakpoint* OnBreakpointAddition(address_t watchInstrPtr);
void OnBreakpointDeletion(Gem5Breakpoint* bp);
// Controller-related:
unsigned int GetCPUId(System* sys, int context);
System* GetSystemObject();