Merge branch 'register-mapping-fixes'
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@ -32,9 +32,8 @@ bool RegisterImporter::addRegisterTrace(simtime_t curtime, instruction_count_t i
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const Trace_Event &ev,
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const LLVMtoFailTranslator::reginfo_t &info,
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char access_type) {
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LLVMtoFailTranslator::reginfo_t one_byte_window = info;
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one_byte_window.width = 8;
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address_t from = one_byte_window.toDataAddress(), to = one_byte_window.toDataAddress() + (info.width) / 8;
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address_t from = info.toDataAddress();
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address_t to = from + info.width / 8;
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// Iterate over all accessed bytes
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for (address_t data_address = from; data_address < to; ++data_address) {
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@ -130,6 +129,12 @@ bool RegisterImporter::handle_ip_event(fail::simtime_t curtime, instruction_coun
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for (std::vector<LLVMDisassembler::register_t>::const_iterator it = opcode.reg_uses.begin();
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it != opcode.reg_uses.end(); ++it) {
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const LLVMtoFailTranslator::reginfo_t &info = ltof.getFailRegisterID(*it);
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if (&info == <of.notfound) {
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LOG << "Could not find a mapping for LLVM input register #" << std::dec << *it
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<< " at IP " << std::hex << ev.ip()
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<< ", skipping" << std::endl;
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continue;
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}
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/* if not tracing flags, but flags register -> ignore it
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if not tracing gp, but ! flags -> ignore it*/
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@ -146,6 +151,13 @@ bool RegisterImporter::handle_ip_event(fail::simtime_t curtime, instruction_coun
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for (std::vector<LLVMDisassembler::register_t>::const_iterator it = opcode.reg_defs.begin();
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it != opcode.reg_defs.end(); ++it) {
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const LLVMtoFailTranslator::reginfo_t &info = ltof.getFailRegisterID(*it);
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if (&info == <of.notfound) {
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LOG << "Could not find a mapping for LLVM output register #" << std::dec << *it
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<< " at IP " << std::hex << ev.ip()
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<< ", skipping" << std::endl;
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continue;
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}
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/* if not tracing flags, but flags register -> ignore it
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if not tracing gp, but ! flags -> ignore it*/
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if (info.id == RID_FLAGS && !do_flags)
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