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T32 Simulator: Basic Instruction set sim for ARMM3

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The T32 can simulate bare instruction sets without periphery.
For the Cortex-M3 we have complete NVIC model including Systick Timer.
Currently a simple CiAO can run on the simulator.

TODO:
 - Let memlogger log all memory accesses.
 - Interact with FailT32 for a complete simulation/FI
This commit is contained in:
Martin Hoffmann
2013-03-20 17:17:38 +01:00
parent f0e26a9b63
commit 96bc39c05d
42 changed files with 5880 additions and 46 deletions
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6
debuggers/t32/src/t32cli.cc
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@ -6,8 +6,8 @@
using namespace std;
void err(int ernum){
if(err != 0){
cerr << "Error: " << err << endl;
if(ernum != 0){
cerr << "Error: " << ernum << endl;
//exit(-1);
}
}
@ -36,7 +36,7 @@ int eval_command(){
int main(void){
cout << "Lauterbach remote connection" << endl;
cout << "Enter bye to exit." << endl;
int error;
char hostname[] = "localhost";
char packlen[] = "1024";
char port[] = "20010";