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T32 Simulator: Basic Instruction set sim for ARMM3

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The T32 can simulate bare instruction sets without periphery.
For the Cortex-M3 we have complete NVIC model including Systick Timer.
Currently a simple CiAO can run on the simulator.

TODO:
 - Let memlogger log all memory accesses.
 - Interact with FailT32 for a complete simulation/FI
This commit is contained in:
Martin Hoffmann
2013-03-20 17:17:38 +01:00
parent f0e26a9b63
commit 96bc39c05d
42 changed files with 5880 additions and 46 deletions
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10
debuggers/t32/sim/memlogger/CMakeLists.txt Normal file
View File

@ -0,0 +1,10 @@
# NVIC simulation model for the T32
set(SRCS
memlogger.c
../include/simul.c
)
add_library(memlogger SHARED ${SRCS})
GET_TARGET_PROPERTY(__T32_MEMLOGGER_LIB memlogger LOCATION)
SET(T32_MEMLOGGER_LIB "${__T32_MEMLOGGER_LIB}" CACHE INTERNAL "")