T32 Simulator: Basic Instruction set sim for ARMM3

The T32 can simulate bare instruction sets without periphery.
For the Cortex-M3 we have complete NVIC model including Systick Timer.
Currently a simple CiAO can run on the simulator.

TODO:
 - Let memlogger log all memory accesses.
 - Interact with FailT32 for a complete simulation/FI
This commit is contained in:
Martin Hoffmann
2013-03-20 17:17:38 +01:00
parent f0e26a9b63
commit 96bc39c05d
42 changed files with 5880 additions and 46 deletions

View File

@ -0,0 +1,25 @@
#include "nvic.h"
/*************** Software Trigger Interrupt Register ***************/
int STIR_Write(simulProcessor processor, simulCallbackStruct * cbs, simulPtr _private)
{
IntController *IntCtrl = (IntController*) _private;
int arrayidx;
simulWord32 reg = 0;
int wakeUpEvent = 0;
cbs->x.bus.clocks = 1;
BusRead(&cbs->x.bus,&reg);
arrayidx = (reg & 0x1FF) + 16;
if (arrayidx < 256)
{
ChangePending(arrayidx,1);
Interrupt(processor,IntCtrl,wakeUpEvent);
}
return SIMUL_MEMORY_OK;
}