T32 Simulator: Basic Instruction set sim for ARMM3
The T32 can simulate bare instruction sets without periphery. For the Cortex-M3 we have complete NVIC model including Systick Timer. Currently a simple CiAO can run on the simulator. TODO: - Let memlogger log all memory accesses. - Interact with FailT32 for a complete simulation/FI
This commit is contained in:
4
debuggers/t32/sim/CMakeLists.txt
Normal file
4
debuggers/t32/sim/CMakeLists.txt
Normal file
@ -0,0 +1,4 @@
|
||||
include_directories(include)
|
||||
|
||||
add_subdirectory(${T32_ARCHITECTURE})
|
||||
add_subdirectory(memlogger)
|
||||
Reference in New Issue
Block a user