From 924e234db155f9f4d697d6d4033de2a5a3495752 Mon Sep 17 00:00:00 2001 From: Horst Schirmeier Date: Tue, 11 Dec 2018 14:09:27 +0100 Subject: [PATCH] util/llvmdisassembler: fix address -> register translation Due to a typo (cast to regwidth_t instead of regdata_t), accesses to register content beyond an offset of 32 bits via LLVMtoFailTranslator::reginfo_t did not work correctly. Additionally, this change fixes constructing reginfo_t with a bit width >= 64 (e.g. the whole RAX register). Change-Id: I24914cd64fa51118eeac38cc3fb47b76790d3aac --- .../util/llvmdisassembler/LLVMtoFailTranslator.hpp | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/src/core/util/llvmdisassembler/LLVMtoFailTranslator.hpp b/src/core/util/llvmdisassembler/LLVMtoFailTranslator.hpp index 84cb02d0..f25dcbb2 100644 --- a/src/core/util/llvmdisassembler/LLVMtoFailTranslator.hpp +++ b/src/core/util/llvmdisassembler/LLVMtoFailTranslator.hpp @@ -38,7 +38,15 @@ public: } reginfo_t(int id=-1, regwidth_t width = 32, byte_t offs = 0) - : id(id), width(width), mask((regwidth_t)((((long long)1 << width) - 1) << offs)), offset(offs) {}; + : id(id), width(width), mask((((regdata_t) 1 << width) - 1) << offs), offset(offs) + { + if (width >= sizeof(regdata_t) * 8) { // all ones, (1 << width) == 0! + mask = -1; + } +#if 0 + std::cerr << "constructing reginfo_t: " << std::dec << id << " " << width << " " << ((int)offs) << std::hex << " 0x" << mask << std::endl; +#endif + } }; protected: