debuggers: import openocd-0.7.0

Initial check-in of openocd-0.7.0 as it can be downloaded from
http://sourceforge.net/projects/openocd/files/openocd/0.7.0/

Any modifications will follow.

Change-Id: I6949beaefd589e046395ea0cb80f4e1ab1654d55

debuggers/openocd/tcl/target/imx27.cfg

@@ -0,0 +1,53 @@
+# page 3-34 of "MCIMC27 Multimedia Applications Processor Reference Manual, Rev 0.3"
+# SRST pulls TRST
+#
+# Without setting these options correctly you'll see all sorts
+# of weird errors, e.g. MOE=0xe, invalid cpsr values, reset
+# failing, etc.
+reset_config trst_and_srst srst_pulls_trst
+
+if { [info exists CHIPNAME] } {
+   set _CHIPNAME $CHIPNAME
+} else {
+   set _CHIPNAME imx27
+}
+
+if { [info exists ENDIAN] } {
+   set _ENDIAN $ENDIAN
+} else {
+   set _ENDIAN little
+}
+
+
+# Note above there are 2 taps
+
+# trace buffer
+if { [info exists ETBTAPID] } {
+   set _ETBTAPID $ETBTAPID
+} else {
+   set _ETBTAPID 0x1b900f0f
+}
+jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0xf -expected-id $_ETBTAPID
+
+# The CPU tap
+if { [info exists CPUTAPID] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+   set _CPUTAPID 0x07926121
+}
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+# Create the GDB Target.
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
+# REVISIT what operating environment sets up this virtual address mapping?
+$_TARGETNAME configure -work-area-virt 0xffff4c00 -work-area-phys 0xffff4c00 \
+	-work-area-size 0x8000 -work-area-backup 1
+# Internal to the chip, there is 45K of SRAM
+#
+
+arm7_9 dcc_downloads enable
+
+# trace setup
+etm config $_TARGETNAME 16 normal full etb
+etb config $_TARGETNAME $_CHIPNAME.etb