debuggers: import openocd-0.7.0
Initial check-in of openocd-0.7.0 as it can be downloaded from http://sourceforge.net/projects/openocd/files/openocd/0.7.0/ Any modifications will follow. Change-Id: I6949beaefd589e046395ea0cb80f4e1ab1654d55
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debuggers/openocd/tcl/target/at91sam4XXX.cfg
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debuggers/openocd/tcl/target/at91sam4XXX.cfg
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# script for ATMEL sam4, a CORTEX-M4 chip
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#
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME sam4
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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# JTAG speed should be <= F_CPU/6. F_CPU after reset is 4 MHz, so use F_JTAG = 0.5MHz
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#
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# Since we may be running of an RC oscilator, we crank down the speed a
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# bit more to be on the safe side. Perhaps superstition, but if are
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# running off a crystal, we can run closer to the limit. Note
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# that there can be a pretty wide band where things are more or less stable.
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adapter_khz 500
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adapter_nsrst_delay 100
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jtag_ntrst_delay 100
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#jtag scan chain
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x4ba00477
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}
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
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# 16K is plenty, the smallest chip has this much
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0
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$_TARGETNAME configure -event gdb-flash-erase-start {
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halt
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}
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# if srst is not fitted use SYSRESETREQ to
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# perform a soft reset
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cortex_m reset_config sysresetreq
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