debuggers: import openocd-0.7.0

Initial check-in of openocd-0.7.0 as it can be downloaded from
http://sourceforge.net/projects/openocd/files/openocd/0.7.0/

Any modifications will follow.

Change-Id: I6949beaefd589e046395ea0cb80f4e1ab1654d55

debuggers/openocd/tcl/target/at91sam3XXX.cfg

@@ -0,0 +1,72 @@
+# script for ATMEL sam3, a CORTEX-M3 chip
+#
+# at91sam3u4e
+# at91sam3u2e
+# at91sam3u1e
+# at91sam3u4c
+# at91sam3u2c
+# at91sam3u1c
+#
+# at91sam3s4c
+# at91sam3s4b
+# at91sam3s4a
+# at91sam3s2c
+# at91sam3s2b
+# at91sam3s2a
+# at91sam3s1c
+# at91sam3s1b
+# at91sam3s1a
+#
+# at91sam3A4C
+# at91sam3A8C
+# at91sam3X4C
+# at91sam3X4E
+# at91sam3X8C
+# at91sam3X8E
+# at91sam3X8H
+if { [info exists CHIPNAME] } {
+   set _CHIPNAME $CHIPNAME
+} else {
+   set _CHIPNAME sam3
+}
+
+if { [info exists ENDIAN] } {
+   set _ENDIAN $ENDIAN
+} else {
+   set _ENDIAN little
+}
+
+# JTAG speed should be <= F_CPU/6. F_CPU after reset is 4 MHz, so use F_JTAG = 0.5MHz
+#
+# Since we may be running of an RC oscilator, we crank down the speed a
+# bit more to be on the safe side. Perhaps superstition, but if are
+# running off a crystal, we can run closer to the limit. Note
+# that there can be a pretty wide band where things are more or less stable.
+
+adapter_khz 500
+
+adapter_nsrst_delay 100
+jtag_ntrst_delay 100
+
+#jtag scan chain
+if { [info exists CPUTAPID] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+   set _CPUTAPID 0x4ba00477
+}
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
+
+# 16K is plenty, the smallest chip has this much
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0
+
+$_TARGETNAME configure -event gdb-flash-erase-start {
+    halt
+}
+
+# if srst is not fitted use SYSRESETREQ to
+# perform a soft reset
+cortex_m reset_config sysresetreq