debuggers: import openocd-0.7.0

Initial check-in of openocd-0.7.0 as it can be downloaded from
http://sourceforge.net/projects/openocd/files/openocd/0.7.0/

Any modifications will follow.

Change-Id: I6949beaefd589e046395ea0cb80f4e1ab1654d55

debuggers/openocd/tcl/target/aduc702x.cfg

@@ -0,0 +1,53 @@
+if { [info exists CHIPNAME] } {
+   set _CHIPNAME $CHIPNAME
+} else {
+   set _CHIPNAME aduc702x
+}
+
+if { [info exists ENDIAN] } {
+   set _ENDIAN $ENDIAN
+} else {
+   # This config file was defaulting to big endian..
+   set _ENDIAN little
+}
+
+if { [info exists CPUTAPID] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+   set _CPUTAPID 0x3f0f0f0f
+}
+
+adapter_nsrst_delay 200
+jtag_ntrst_delay 200
+
+## JTAG scan chain
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+##
+## Target configuration
+##
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
+
+# allocate the entire SRAM as working area
+$_TARGETNAME configure -work-area-phys 0x10000 -work-area-size 0x2000
+
+## flash configuration
+# only target number is needed
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME aduc702x 0 0 0 0 $_TARGETNAME
+
+## If you use the watchdog, the following code makes sure that the board
+## doesn't reboot when halted via JTAG.  Yes, on the older generation
+## AdUC702x, timer3 continues running even when the CPU is halted.
+
+proc watchdog_service {} {
+    global watchdog_hdl
+    mww 0xffff036c 0
+#    echo "watchdog!!"
+    set watchdog_hdl [after 500 watchdog_service]
+}
+
+$_TARGETNAME configure -event reset-halt-post {  watchdog_service }
+$_TARGETNAME configure -event resume-start { global watchdog_hdl; after cancel $watchdog_hdl }