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Adding x86 I/O port communication capabilities (see IOPortEvent)

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git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1295 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
This commit is contained in:
unzner
2012-06-04 10:53:28 +00:00
parent 02e62e7cb8
commit 70d6dae1e2
8 changed files with 138 additions and 14 deletions
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38
core/SAL/bochs/IOPortCom.ah Normal file
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#ifndef __IOPORT_COM_AH__
#define __IOPORT_COM_AH__
#include "config/FailConfig.hpp"
#ifdef CONFIG_EVENT_IOPORT
#include "../../../bochs/bochs.h"
#include "../../../bochs/cpu/cpu.h"
#include "../SALInst.hpp"
#include "bochs_helpers.hpp"
aspect IOPortCom
{
// ATM only capturing bytewise output (most common, I suppose)
pointcut outInstruction() = "% ...::bx_cpu_c::OUT_DXAL%(...)";
advice execution (outInstruction()) : after ()
{
unsigned rDX = getCPU(tjp->that())->gen_reg[2].word.rx; // port number
unsigned char rAL = getCPU(tjp->that())->gen_reg[0].word.byte.rl; // data
sal::simulator.onIOPortEvent(rAL, rDX, true);
}
pointcut inInstruction() = "% ...::bx_cpu_c::IN_ALDX%(...)";
advice execution (inInstruction()) : after ()
{
unsigned rDX = getCPU(tjp->that())->gen_reg[2].word.rx; // port number
unsigned char rAL = getCPU(tjp->that())->gen_reg[0].word.byte.rl; // data
sal::simulator.onIOPortEvent(rAL, rDX, false);
}
};
#endif // CONFIG_EVENT_IOPORT
#endif /* __IOPORT_COM_AH__ */