event data outsourced, SAL config flags revised, tiny coding-style fixes.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1462 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
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adrian
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src/core/sal/Event.hpp
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329
src/core/sal/Event.hpp
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#ifndef __EVENT_HPP__
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#define __EVENT_HPP__
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#include <ctime>
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#include <string>
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#include <cassert>
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#include <vector>
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#include <utility>
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#include <iostream>
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#include "SALConfig.hpp"
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namespace fail {
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/**
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* \class BaseEvent
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* This is the base class for all event types. It just encapsulates the
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* information reported by the simulator-backend when triggering an "event".
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*/
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class BaseEvent {
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public:
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BaseEvent() { }
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virtual ~BaseEvent() { }
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};
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// ----------------------------------------------------------------------------
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// Specialized events:
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//
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/**
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* \class BPEvent
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* A Breakpoint event to observe instruction changes within a given address space.
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*/
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class BPEvent : virtual public BaseEvent {
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protected:
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address_t m_TriggerInstrPtr; //!< the address which triggered the event
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public:
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/**
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* Creates a new breakpoint event. The range information is specific to
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* the subclasses.
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* @param trigger the triggering address of the breakpoint event
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*/
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BPEvent(address_t trigger) : m_TriggerInstrPtr(trigger) { }
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/**
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* Returns the instruction pointer that triggered this event.
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* @return triggering IP
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*/
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address_t getTriggerInstructionPointer() const { return m_TriggerInstrPtr; }
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/**
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* Sets the instruction pointer that triggered this event.
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* @param iptr new IP which caused this event
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*/
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void setTriggerInstructionPointer(address_t iptr) { m_TriggerInstrPtr = iptr; }
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};
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/**
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* \class MemAccessEvent
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* Observes memory read/write accesses.
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* FIXME? currently >8-bit accesses only match if their lowest address is being watched
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* (e.g., a 32-bit write to 0x4 also accesses 0x7, but this cannot be matched)
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*/
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class MemAccessEvent : virtual public BaseEvent {
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public:
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enum access_type_t {
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MEM_UNKNOWN = 0x0, //!< internal initialization flag, indicating an uninitialized state
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MEM_READ = 0x1, //!< read access flag
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MEM_WRITE = 0x2, //!< write access flag
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MEM_READWRITE = 0x3 //!< read and write access flag
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};
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private:
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//! Specific guest system *memory* address that actually triggered the event.
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address_t m_TriggerAddr;
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//! Width of the memory access (# bytes).
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size_t m_TriggerWidth;
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//! Address of the \b instruction that caused the memory access.
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address_t m_TriggerIP;
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//! Memory access type at m_TriggerAddr.
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access_type_t m_AccessType;
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public:
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/**
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* Creates a new \c MemAccessEvent using default initialization values, i.e.
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* \c setTriggerAddress(ANY_ADDR), \c setTriggerWidth(0), \c setTriggerAccessType(MEM_UNKNOWN)
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* and \c setTriggerInstructionPointer(ANY_ADDR).
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*/
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MemAccessEvent()
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: m_TriggerAddr(ANY_ADDR), m_TriggerWidth(0),
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m_TriggerIP(ANY_ADDR), m_AccessType(MEM_UNKNOWN) { }
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/**
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* Creates a new \c MemAccessEvent and initializes the provided values.
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* @param triggerAddr actual address that triggered the event
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* @param width width of memory access (= # Bytes)
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* @param triggerIP the instruction pointer that actually triggered the memory access
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* @param type the type of memory access (r, w, rw)
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*/
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MemAccessEvent(address_t triggerAddr, size_t width, address_t triggerIP, access_type_t type)
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: m_TriggerAddr(triggerAddr), m_TriggerWidth(width),
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m_TriggerIP(triggerIP), m_AccessType(type) { }
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/**
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* Returns the specific memory address that actually triggered the event.
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* @return the triggering address
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*/
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address_t getTriggerAddress() const { return m_TriggerAddr; }
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/**
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* Sets the specific memory address that actually triggered the event.
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* Should not be used by experiment code.
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* @param addr the new triggering address
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*/
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void setTriggerAddress(address_t addr) { m_TriggerAddr = addr; }
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/**
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* Returns the specific number of bytes read or written at \c getTriggerAddress().
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* @return the width of the memory access
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*/
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size_t getTriggerWidth() const { return m_TriggerWidth; }
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/**
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* Sets the specific memory access width.
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* @param new width (number of bytes)
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*/
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void setTriggerWidth(size_t width) { m_TriggerWidth = width; }
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/**
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* Returns the address of the instruction causing this memory access.
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* @return triggering IP
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*/
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address_t getTriggerInstructionPointer() const { return m_TriggerIP; }
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/**
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* Sets the address of the instruction causing this memory access.
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* @param addr new triggering IP
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*/
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void setTriggerInstructionPointer(address_t addr) { m_TriggerIP = addr; }
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/**
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* Returns type (MEM_READ || MEM_WRITE) of the memory access that
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* triggered this event.
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* @return the type of memory access (r or w) of this event
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*/
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access_type_t getTriggerAccessType() const { return m_AccessType; }
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/**
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* Sets type of the memory access that triggered this event.
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* @param type type of memory access
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*/
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void setTriggerAccessType(access_type_t type) { m_AccessType = type; }
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};
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/**
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* \class TroubleEvent
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* Observes interrupt/trap activties.
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*/
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class TroubleEvent : virtual public BaseEvent {
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private:
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/**
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* Specific guest system interrupt/trap number that actually
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* trigger the event.
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*/
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int m_TriggerNumber;
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public:
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/**
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* Constructs a default initialized \c TroubleEvent, setting the trigger-number
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* to -1.
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*/
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TroubleEvent() : m_TriggerNumber(-1) { }
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/**
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* Constructs a new \c TroubleEvent.
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* @param triggerNum system and type specific number identifying the requestet
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* "trouble-type"
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*/
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TroubleEvent(int triggerNum)
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: m_TriggerNumber(triggerNum) { }
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/**
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* Sets the specific interrupt-/trap-number that actually triggered the event.
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* @param triggerNum system and type specific number identifying the requested
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* "trouble-type"
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*/
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void setTriggerNumber(unsigned triggerNum) { m_TriggerNumber = triggerNum; }
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/**
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* Returns the specific interrupt-/trap-number that actually triggered the event.
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* @return the trigger number
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*/
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unsigned getTriggerNumber() const { return m_TriggerNumber; }
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};
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/**
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* \class InterruptEvent
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* Observes interrupts of the guest system.
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*/
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class InterruptEvent : virtual public TroubleEvent {
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private:
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bool m_IsNMI; //!< non maskable interrupt flag
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public:
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/**
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* Constructs a default initialized \c InterruptEvent, setting the non maskable
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* interrupt flag to \c false.
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*/
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InterruptEvent() : m_IsNMI(false) { }
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/**
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* Creates a new \c InterruptEvent.
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* @param nmi the new NMI (non maskable interrupt) flag state
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*/
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InterruptEvent(bool nmi) : m_IsNMI(nmi) { }
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/**
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* Returns \c true if the interrupt is non maskable, \c false otherwise.
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* @return \c true if NMI flag is set, \c false otherwise
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*/
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bool isNMI() { return m_IsNMI; }
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/**
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* Sets the interrupt type (non maskable or not).
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* @param nmi the new NMI (non maskable interrupt) flag state
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*/
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void setNMI(bool enabled) { m_IsNMI = enabled; }
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};
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/**
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* \class GuestEvent
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* Used to receive data from the guest system.
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*/
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// FIXME: cf. GuestListener
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class GuestEvent : virtual public BaseEvent {
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private:
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char m_Data; //!< guest event data
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unsigned m_Port; //!< communication port
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public:
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GuestEvent() : m_Data(0), m_Port(0) { }
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/**
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* Returns the data, transmitted by the guest system.
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*/
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char getData() const { return m_Data; }
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/**
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* Sets the data which had been transmitted by the guest system.
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*/
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void setData(char data) { m_Data = data; }
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/**
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* Returns the data length, transmitted by the guest system.
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*/
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unsigned getPort() const { return m_Port; }
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/**
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* Sets the data length which had been transmitted by the guest system.
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*/
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void setPort(unsigned port) { m_Port = port; }
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};
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/**
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* \class IOPortEvent
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* Observes I/O access on architectures with a separate I/O access mechanism (e.g. IA-32)
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*/
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class IOPortEvent : virtual public BaseEvent {
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private:
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unsigned char m_Data;
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public:
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/**
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* Initialises an IOPortEvent
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* @param data the data which has been communicated through the I/O port
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*/
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IOPortEvent(unsigned char data = 0) : m_Data(data) { }
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/**
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* Returns the data sent to the specified port
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*/
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unsigned char getData() const { return m_Data; }
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/**
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* Sets the data which had been transmitted.
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*/
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void setData(unsigned char data) { m_Data = data; }
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};
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/**
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* \class JumpEvent
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* JumpEvents are used to observe conditional jumps (if...else if...else).
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*/
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class JumpEvent : virtual public BaseEvent {
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private:
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unsigned m_OpcodeTrigger;
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bool m_FlagTriggered;
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public:
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/**
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* Constructs a new event object.
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* @param opcode the opcode of the jump-instruction to be observed
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* or ANY_INSTR to match all jump-instructions
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* @param flagreg \c true if the event has been triggered due to a
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* specific FLAG register content, \c false otherwise
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*/
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JumpEvent(unsigned opcode = ANY_INSTR, bool flagreg = false)
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: m_OpcodeTrigger(opcode), m_FlagTriggered(flagreg) { }
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/**
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* Retrieves the opcode of the jump-instruction.
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*/
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unsigned getTriggerOpcode() const { return m_OpcodeTrigger; }
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/**
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* Returns \c true, if the event was triggered due to specific register
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* content, \c false otherwise.
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*/
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bool isRegisterTriggered() const { return !m_FlagTriggered; }
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/**
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* Returns \c true, of the event was triggered due to specific FLAG
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* state, \c false otherwise. This is the common case.
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*/
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bool isFlagTriggered() const { return m_FlagTriggered; }
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/**
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* Sets the requestet jump-instruction opcode.
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*/
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void setTriggerOpcode(unsigned oc) { oc = m_OpcodeTrigger; }
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/**
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* Sets the trigger flag.
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*/
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void setFlagTriggered(bool flagTriggered) { m_FlagTriggered = flagTriggered; }
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};
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/**
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* \class GenericTimerEvent
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* This event type is used to encapsulate timeout-specific data.
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*/
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class GenericTimerEvent : public BaseEvent {
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protected:
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timer_id_t m_Id; //!< internal timer id (sim-specific)
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public:
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/**
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* Creates a new timer event.
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*/
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GenericTimerEvent(timer_id_t id = INVALID_TIMER) : m_Id(id) { }
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~GenericTimerEvent() { }
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/**
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* Retrieves the internal timer id. Maybe useful for debug output.
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* @return the timer id or \c INVALID_TIMER if the timer is invalid
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*/
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timer_id_t getId() const { return m_Id; }
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/**
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* Sets the internal timer id. This should not be used by the experiment.
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* @param id the new timer id, given by the underlying simulator-backend
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*/
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void setId(timer_id_t id) { m_Id = id; }
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};
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} // end-of-namespace: fail
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#endif // __EVENT_HPP__
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