Merge "gem5: revisited breakpoint implementation"
This commit is contained in:
@ -377,12 +377,6 @@ BaseSimpleCPU::preExecute()
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TheISA::PCState pcState = thread->pcState();
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TheISA::PCState pcState = thread->pcState();
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// FAIL*
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#if defined(CONFIG_EVENT_BREAKPOINTS) && defined(CONFIG_EVENT_BREAKPOINTS_RANGE)
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fail::ConcreteCPU* cpu = &fail::simulator.getCPU(cpuId());
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fail::simulator.onBreakpoint(cpu, instAddr(), -1);
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#endif
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if (isRomMicroPC(pcState.microPC())) {
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if (isRomMicroPC(pcState.microPC())) {
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stayAtPC = false;
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stayAtPC = false;
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curStaticInst = microcodeRom.fetchMicroop(pcState.microPC(),
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curStaticInst = microcodeRom.fetchMicroop(pcState.microPC(),
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@ -406,6 +400,14 @@ BaseSimpleCPU::preExecute()
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//Decode an instruction if one is ready. Otherwise, we'll have to
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//Decode an instruction if one is ready. Otherwise, we'll have to
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//fetch beyond the MachInst at the current pc.
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//fetch beyond the MachInst at the current pc.
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instPtr = decoder->decode(pcState);
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instPtr = decoder->decode(pcState);
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// FAIL*
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#if defined(CONFIG_EVENT_BREAKPOINTS) || defined(CONFIG_EVENT_BREAKPOINTS_RANGE)
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fail::ConcreteCPU* cpu = &fail::simulator.getCPU(cpuId());
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fail::simulator.setMnemonic(instPtr->getName());
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fail::simulator.onBreakpoint(cpu, instAddr(), -1);
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#endif
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if (instPtr) {
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if (instPtr) {
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stayAtPC = false;
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stayAtPC = false;
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thread->pcState(pcState);
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thread->pcState(pcState);
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@ -1,18 +0,0 @@
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#ifndef __GEM5_BREAKPOINT_HPP__
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#define __GEM5_BREAKPOINT_HPP__
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#include "../SALConfig.hpp"
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#include "cpu/pc_event.hh"
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namespace fail {
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class Gem5Breakpoint : public PCEvent {
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public:
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Gem5Breakpoint(PCEventQueue* queue, Addr ip)
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: PCEvent(queue, "Fail* experiment breakpoint", ip) { }
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virtual void process(ThreadContext *tc);
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};
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} // end-of-namespace: fail
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#endif // __GEM5_BREAKPOINT_HPP__
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@ -1,29 +0,0 @@
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#ifndef __GEM5_LISTENER_AH__
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#define __GEM5_LISTENER_AH__
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#include "config/FailConfig.hpp"
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#include "config/VariantConfig.hpp"
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#if defined(BUILD_GEM5) && defined(CONFIG_EVENT_BREAKPOINTS) && !defined(CONFIG_EVENT_BREAKPOINTS_RANGE)
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aspect Gem5Listener {
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advice "fail::BPSingleListener" : slice class {
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private:
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Gem5Breakpoint* m_Breakpoint;
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public:
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virtual bool onAddition()
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{
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m_Breakpoint = OnBreakpointAddition(Gem5Breakpoint* bp, address_t watchInstrPtr)
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return true;
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}
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virtual void onDeletion()
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{
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OnBreakpointDeletion(m_Breakpoint);
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m_Breakpoint = 0;
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}
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};
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};
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#endif // defined(BUILD_GEM5) && defined(CONFIG_EVENT_BREAKPOINTS) && !defined(CONFIG_EVENT_BREAKPOINTS_RANGE)
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#endif // __GEM5_LISTENER_AH__
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@ -1,6 +1,5 @@
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#include "../SALInst.hpp"
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#include "../SALInst.hpp"
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#include "Gem5Wrapper.hpp"
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#include "Gem5Wrapper.hpp"
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#include "Gem5Breakpoint.hpp"
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#include "sim/system.hh"
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#include "sim/system.hh"
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#include "mem/packet.hh"
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#include "mem/packet.hh"
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@ -61,27 +60,6 @@ void WriteMemory(System* sys, guest_address_t addr, size_t cnt, void const *src)
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size_t GetPoolSize(System* sys) { return sys->getPhysMem().totalSize(); }
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size_t GetPoolSize(System* sys) { return sys->getPhysMem().totalSize(); }
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// Breakpoint-related:
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void Gem5Breakpoint::process(ThreadContext *tc)
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{
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fail::simulator.onBreakpoint(&fail::simulator.getCPU(tc->cpuId()), this->evpc, fail::ANY_ADDR);
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}
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Gem5Breakpoint* OnBreakpointAddition(address_t watchInstrPtr)
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{
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System* sys = *System::systemList.begin();
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// FIXME: begin() vs. front() (see Gem5Controller::startup())
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// FIXME: Provide "sys" using the simulator-inst?
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return new Gem5Breakpoint(&sys->pcEventQueue, watchInstrPtr);
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}
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void OnBreakpointDeletion(Gem5Breakpoint* bp)
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{
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if (bp) {
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delete bp; // TODO: required?
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}
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}
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// Controller-related:
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// Controller-related:
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unsigned int GetCPUId(System* sys, int context)
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unsigned int GetCPUId(System* sys, int context)
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{
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{
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@ -9,8 +9,6 @@ class System;
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namespace fail {
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namespace fail {
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class Gem5Breakpoint;
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// Register-/Memory-related:
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// Register-/Memory-related:
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regdata_t GetRegisterContent(System* sys, unsigned int id, RegisterType type, size_t idx);
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regdata_t GetRegisterContent(System* sys, unsigned int id, RegisterType type, size_t idx);
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void SetRegisterContent(System* sys, unsigned int id, RegisterType type, size_t idx,
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void SetRegisterContent(System* sys, unsigned int id, RegisterType type, size_t idx,
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@ -19,10 +17,6 @@ void WriteMemory(System* sys, guest_address_t addr, size_t cnt, void const *src)
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void ReadMemory(System* sys, guest_address_t addr, size_t cnt, void *dest);
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void ReadMemory(System* sys, guest_address_t addr, size_t cnt, void *dest);
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size_t GetPoolSize(System* sys);
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size_t GetPoolSize(System* sys);
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// Breakpoint-related:
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Gem5Breakpoint* OnBreakpointAddition(address_t watchInstrPtr);
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void OnBreakpointDeletion(Gem5Breakpoint* bp);
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// Controller-related:
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// Controller-related:
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unsigned int GetCPUId(System* sys, int context);
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unsigned int GetCPUId(System* sys, int context);
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System* GetSystemObject();
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System* GetSystemObject();
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