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x86+bochs: add IDs and accessors for FPU and SSE registers

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Change-Id: I33146929255337f679ff80152ed4d83106621ffb
This commit is contained in:
Horst Schirmeier
2018-11-24 00:53:06 +03:00
parent 9625587fc4
commit 67f30a171e
5 changed files with 230 additions and 8 deletions
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8
src/core/sal/bochs/BochsConfig.hpp
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@ -14,11 +14,9 @@ namespace fail {
typedef bx_address guest_address_t; //!< the guest memory address type
typedef Bit8u* host_address_t; //!< the host memory address type
#if BX_SUPPORT_X86_64
typedef Bit64u register_data_t; //!< register data type (64 bit)
#else
typedef Bit32u register_data_t; //!< register data type (32 bit)
#endif
//! register data type (64 bit, regardless of BX_SUPPORT_X86_64: FPU and vector
//! registers are that size or larger also for 32-bit machines)
typedef Bit64u register_data_t;
typedef int timer_t; //!< type of timer IDs
// 'Publish' 64 bit ability (if enabled in Bochs):