sal: CPU now knows extended trace registers
The extended trace register list is needed in multiple locations; the CPU class is the logical module to contain this information. Increased number of x86 registers to be traced; we can remove those that prove unusable for fault-space pruning later on. Change-Id: Ic46ecdbc55167a6d92872c190317fc0d1a3ad92d
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@ -28,15 +28,8 @@ bool TracingPlugin::run()
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ps = new ProtoOStream(m_protoStreamFile);
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}
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#ifdef BUILD_X86
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size_t ids[] = {RID_CSP, RID_CBP, RID_FLAGS};
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#else
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size_t ids[] = {};
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#endif
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Register *regs[sizeof(ids)/sizeof(*ids)];
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for (unsigned i = 0; i < sizeof(ids)/sizeof(*ids); ++i)
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regs[i] = simulator.getCPU(0).getRegister(ids[i]);
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UniformRegisterSet *extended_trace_regs =
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simulator.getCPU(0).getRegisterSetOfType(RT_TRACE);
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// the first event gets an absolute time stamp, all others a delta to their
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// predecessor
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@ -107,10 +100,11 @@ bool TracingPlugin::run()
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mm.getBytes(addr, width, &data);
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ext.set_data(data);
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for (unsigned i = 0; i < sizeof(ids)/sizeof(*ids); ++i) {
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for (UniformRegisterSet::iterator it = extended_trace_regs->begin();
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it != extended_trace_regs->end(); ++it) {
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Trace_Event_Extended_Registers *er = ext.add_registers();
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er->set_id(ids[i]);
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er->set_value(simulator.getCPU(0).getRegisterContent(regs[i]));
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er->set_id((*it)->getId());
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er->set_value(simulator.getCPU(0).getRegisterContent(*it));
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if (er->value() <= mm.getPoolSize() - 4) {
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uint32_t value_deref;
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mm.getBytes(er->value(), 4, &value_deref);
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