sal: CPU now knows extended trace registers

The extended trace register list is needed in multiple locations; the CPU
class is the logical module to contain this information.

Increased number of x86 registers to be traced; we can remove those
that prove unusable for fault-space pruning later on.

Change-Id: Ic46ecdbc55167a6d92872c190317fc0d1a3ad92d

src/core/sal/x86/X86Architecture.cc

@@ -41,6 +41,12 @@ X86Architecture::X86Architecture()
 	Register* pFlagReg = new Register(RID_FLAGS, 32);
 	pFlagReg->setName("EFLAGS");
 	m_addRegister(pFlagReg, RT_ST);
+
+	// Registers used for extended tracing:
+	size_t ids[] = {RID_CAX, RID_CBX, RID_CCX, RID_CDX, RID_CSI, RID_CDI, RID_CSP, RID_CBP, RID_FLAGS};
+	for (size_t i = 0; i < sizeof(ids)/sizeof(*ids); ++i) {
+		m_addRegister(getRegister(ids[i]), RT_TRACE);
+	}
 }
 
 X86Architecture::~X86Architecture()