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sal: CPU now knows extended trace registers

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The extended trace register list is needed in multiple locations; the CPU
class is the logical module to contain this information.

Increased number of x86 registers to be traced; we can remove those
that prove unusable for fault-space pruning later on.

Change-Id: Ic46ecdbc55167a6d92872c190317fc0d1a3ad92d
This commit is contained in:
Horst Schirmeier
2013-06-25 17:16:54 +02:00
parent 52723a874e
commit 4e3c9e3758
4 changed files with 22 additions and 13 deletions
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4
src/core/sal/Register.hpp
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@ -23,7 +23,9 @@ enum RegisterType {
RT_GP, //!< general purpose
RT_FP, //!< floating point register
RT_IP, //!< program counter / instruction pointer
RT_ST //!< status register
RT_ST, //!< status register
RT_TRACE //!< registers to be recorded in an extended trace
};
/**

7
src/core/sal/arm/ArmArchitecture.cc
View File

@ -23,6 +23,13 @@ ArmArchitecture::ArmArchitecture()
Register *reg = new Register(RI_IP, 32);
reg->setName("IP");
m_addRegister(reg, RT_IP);
// Registers used for extended tracing:
size_t ids[] = {RI_R0, RI_R1, RI_R2, RI_R3, RI_R4, RI_R5, RI_R6, RI_R7,
RI_R8, RI_R9, RI_R10, RI_R11, RI_R12, RI_R13, RI_R14};
for (size_t i = 0; i < sizeof(ids)/sizeof(*ids); ++i) {
m_addRegister(getRegister(ids[i]), RT_TRACE);
}
}
ArmArchitecture::~ArmArchitecture()

6
src/core/sal/x86/X86Architecture.cc
View File

@ -41,6 +41,12 @@ X86Architecture::X86Architecture()
Register* pFlagReg = new Register(RID_FLAGS, 32);
pFlagReg->setName("EFLAGS");
m_addRegister(pFlagReg, RT_ST);
// Registers used for extended tracing:
size_t ids[] = {RID_CAX, RID_CBX, RID_CCX, RID_CDX, RID_CSI, RID_CDI, RID_CSP, RID_CBP, RID_FLAGS};
for (size_t i = 0; i < sizeof(ids)/sizeof(*ids); ++i) {
m_addRegister(getRegister(ids[i]), RT_TRACE);
}
}
X86Architecture::~X86Architecture()