A few CPUState-related methods should be const (getter)

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2084 8c4709b5-6ec9-48aa-a5cd-a96041d1645a

src/core/sal/CPUState.cc

@@ -4,7 +4,7 @@ namespace fail {
 
 int interrupt_to_fire = -1;
 
-bool CPUState::isSuppressedInterrupt(unsigned interruptNum)
+bool CPUState::isSuppressedInterrupt(unsigned interruptNum) const
 {
 	for (size_t i = 0; i < m_SuppressedInterrupts.size(); i++)
 		if ((m_SuppressedInterrupts[i] == interruptNum ||

src/core/sal/CPUState.hpp

@@ -20,7 +20,7 @@ public:
 	 * Gets the content of the passed Register.
 	 * @param reg the register to get the content from
 	 */
-	virtual regdata_t getRegisterContent(Register* reg) = 0;
+	virtual regdata_t getRegisterContent(Register* reg) const = 0;
 	/**
 	 * Writes the passed value into the given register.
 	 * @param reg the register that should be written to
@@ -31,18 +31,18 @@ public:
 	 * Returns the current instruction pointer.
 	 * @return the current eip
 	 */
-	virtual address_t getInstructionPointer() = 0;
+	virtual address_t getInstructionPointer() const = 0;
 	/**
 	 * Returns the top address of the stack.
 	 * @return the starting address of the stack
 	 */
-	virtual address_t getStackPointer() = 0;
+	virtual address_t getStackPointer() const = 0;
 	/**
 	 * Check whether the interrupt should be suppressed.
 	 * @param interruptNum the interrupt-type id
 	 * @return \c true if the interrupt is suppressed, \c false oterwise
 	 */
-	bool isSuppressedInterrupt(unsigned interruptNum);
+	bool isSuppressedInterrupt(unsigned interruptNum) const;
 	/**
 	 * Add a Interrupt to the list of suppressed.
 	 * @param interruptNum the interrupt-type id

src/core/sal/Register.cc

@@ -2,7 +2,7 @@
 
 namespace fail {
 
-Register* UniformRegisterSet::getRegister(size_t i)
+Register* UniformRegisterSet::getRegister(size_t i) const
 {
 	assert(i < m_Regs.size() && "FATAL ERROR: Invalid index provided!");
 	return m_Regs[i];

src/core/sal/Register.hpp

@@ -153,13 +153,13 @@ public:
 	 * @return a pointer to the \a i-th register; if \a i is invalid, an
 	 *         assertion is thrown
 	 */
-	Register* getRegister(size_t i);
+	Register* getRegister(size_t i) const;
 	/**
 	 * Retrieves the first register within this set (syntactical sugar).
 	 * @return a pointer to the first register (if existing -- otherwise an
 	 *         assertion is thrown)
 	 */
-	virtual Register* first() { return getRegister(0); }
+	virtual Register* first() const { return getRegister(0); }
 };
 
 } // end-of-namespace: fail

src/core/sal/arm/CPUState.hpp

@@ -13,12 +13,11 @@ namespace fail {
  */
 class ArmCPUState : public CPUState {
 public:
-	virtual regdata_t getRegisterContent(Register* reg) = 0;
 	/**
 	 * Returns the current Link Register.
 	 * @return the current lr
 	 */
-	virtual address_t getLinkRegister() = 0;
+	virtual address_t getLinkRegister() const = 0;
 };
 
 // TODO: Enum for misc registers

src/core/sal/bochs/BochsCPU.cc

@@ -5,7 +5,7 @@
 
 namespace fail {
 
-regdata_t BochsCPU::getRegisterContent(Register* reg)
+regdata_t BochsCPU::getRegisterContent(Register* reg) const
 {
 	assert(reg != NULL && "FATAL ERROR: reg-ptr cannot be NULL!");
 	// TODO: BX_CPU(0) *always* correct?

src/core/sal/bochs/BochsCPU.hpp

@@ -36,7 +36,7 @@ public:
 	 * @param reg the register pointer of interest (cannot be \c NULL)
 	 * @return the content of the register \c reg
 	 */
-	regdata_t getRegisterContent(Register* reg);
+	regdata_t getRegisterContent(Register* reg) const;
 	/**
 	 * Sets the content of the register \c reg to \c value.
 	 * @param reg the destination register object pointer (cannot be \c NULL)
@@ -47,22 +47,22 @@ public:
 	 * Returns the current instruction pointer (aka program counter).
 	 * @return the current (e)ip register content
 	 */
-	address_t getInstructionPointer() { return getRegisterContent(getRegister(RID_PC)); }
+	address_t getInstructionPointer() const { return getRegisterContent(getRegister(RID_PC)); }
 	/**
 	 * Returns the current stack pointer.
 	 * @return the current (e)sp register content
 	 */
-	address_t getStackPointer() { return getRegisterContent(getRegister(RID_CSP)); }
+	address_t getStackPointer() const { return getRegisterContent(getRegister(RID_CSP)); }
 	/**
 	 * Returns the current base pointer.
 	 * @return the current (e)bp register content
 	 */
-	address_t getBasePointer() { return getRegisterContent(getRegister(RID_CBP)); }
+	address_t getBasePointer() const { return getRegisterContent(getRegister(RID_CBP)); }
 	/**
 	 * Returns the current (E)FLAGS.
 	 * @return the current (E)FLAGS processor register content
 	 */
-	regdata_t getFlagsRegister() { return getRegisterContent(getRegister(RID_FLAGS)); }
+	regdata_t getFlagsRegister() const { return getRegisterContent(getRegister(RID_FLAGS)); }
 	/**
 	 * Returns \c true if the corresponding flag is set, or \c false
 	 * otherwise.
@@ -106,7 +106,7 @@ public:
 	 * Returns the current id of this CPU.
 	 * @return the current id
 	 */
-	unsigned int getId() { return m_Id; }
+	unsigned int getId() const { return m_Id; }
 };
 
 typedef BochsCPU ConcreteCPU; //!< the concrete BochsCPU type

src/core/sal/gem5/Gem5ArmCPU.cc

@@ -2,7 +2,7 @@
 
 namespace fail {
 
-regdata_t Gem5ArmCPU::getRegisterContent(Register* reg)
+regdata_t Gem5ArmCPU::getRegisterContent(Register* reg) const
 {
 	switch (reg->getType())	{
 	case RT_GP:
@@ -40,19 +40,4 @@ void Gem5ArmCPU::setRegisterContent(Register* reg, regdata_t value)
 	// TODO: assertion?
 }
 
-address_t Gem5ArmCPU::getInstructionPointer()
-{
-	return getRegisterContent(getRegister(RI_IP));
-}
-
-address_t Gem5ArmCPU::getStackPointer()
-{
-	return getRegisterContent(getRegister(RI_SP));
-}
-
-address_t Gem5ArmCPU::getLinkRegister()
-{
-	return getRegisterContent(getRegister(RI_LR));
-}
-
 } // end-of-namespace: fail

src/core/sal/gem5/Gem5ArmCPU.hpp

@@ -29,7 +29,7 @@ public:
 	 * @param reg the destination register whose content should be retrieved
 	 * @return the content of register \c reg
 	 */
-	regdata_t getRegisterContent(Register* reg);
+	regdata_t getRegisterContent(Register* reg) const;
 	/**
 	 * Sets the register content for the  \a current gem5 CPU.
 	 * @param reg the (initialized) register object whose content should be set
@@ -41,16 +41,12 @@ public:
 	 * for the current CPU \c this.
 	 * @return the current instruction ptr address
 	 */
-
+	address_t getInstructionPointer() const { return getRegisterContent(getRegister(RI_IP)); }
-	address_t getInstructionPointer();
-	address_t getStackPointer();
-	address_t getLinkRegister();
-
-	unsigned int getId() { return m_Id; }
 	/**
 	 * Retrieves the current stack pointer for the current CPU \c this.
 	 * @return the current stack ptr address
 	 */
+	address_t getStackPointer() const { return getRegisterContent(getRegister(RI_SP)); }
 	/**
 	 * Retrieves the link register (return address when a function returns) for
 	 * the current CPU \c this. See
@@ -58,10 +54,12 @@ public:
 	 * for further information.
 	 * @return the current link register address
 	 */
+	address_t getLinkRegister() const { return getRegisterContent(getRegister(RI_LR)); }
 	/**
 	 * Returns the ID of the current CPU.
 	 * @return the unique ID of \c this CPU object
 	 */
+	unsigned int getId() const { return m_Id; }
 private:
 	unsigned int m_Id; //!< the unique ID of this CPU
 	System* m_System; //!< the gem5 system object

src/core/sal/x86/CPUState.hpp

@@ -16,12 +16,12 @@ public:
 	 * Returns the current content of the base pointer register.
 	 * @return the current (e)bp
 	 */
-	virtual address_t getBasePointer() = 0;
+	virtual address_t getBasePointer() const = 0;
 	/**
 	 * Returns the current (E)FLAGS.
 	 * @return the current (E)FLAGS processor register content
 	 */
-	virtual regdata_t getFlagsRegister() = 0;
+	virtual regdata_t getFlagsRegister() const = 0;
 };
 
 } // end-of-namespace: fail