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coding style++, some TODOs added.

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git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1967 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
This commit is contained in:
adrian
2012-12-05 12:27:17 +00:00
parent b052c0494b
commit 35753cd075
7 changed files with 23 additions and 32 deletions
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6
src/core/sal/arm/arch.cc
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@ -12,8 +12,7 @@ void ArmArchitecture::fillRegisterList()
{
// TODO: Add missing registers
// 16x 32-Bit GP Registers
for (int i=0; i<16; i++)
{
for (int i = 0; i < 16; i++) {
Register *reg = new Register(i, RT_GP, 32);
addRegister(reg);
}
@ -22,8 +21,7 @@ void ArmArchitecture::fillRegisterList()
ArmArchitecture::~ArmArchitecture()
{
std::vector< Register* >::iterator it = m_Registers.begin();
while(it != m_Registers.end())
{
while (it != m_Registers.end()) {
delete *it;
it = m_Registers.erase(it);
}

16
src/core/sal/arm/arch.hpp
View File

@ -1,5 +1,5 @@
#ifndef __ARM_ARCH_HPP__
#define __ARM_ARCH_HPP__
#define __ARM_ARCH_HPP__
#include "../CPU.hpp"
#include "../CPUState.hpp"
@ -7,21 +7,18 @@
namespace fail {
/**
* \class ArmArchitecture
* This class adds ARM specific functionality to the base architecture. This can be used for every
* simulator backend that runs on ARM.
* This class adds ARM specific functionality to the base architecture.
* This can be used for every simulator backend that runs on ARM.
*/
class ArmArchitecture : public CPUArchitecture
{
class ArmArchitecture : public CPUArchitecture {
public:
ArmArchitecture();
~ArmArchitecture();
private:
void fillRegisterList();
};
class ArmCPUState : public CPUState
{
class ArmCPUState : public CPUState {
public:
virtual regdata_t getRegisterContent(Register* reg) = 0;
@ -34,8 +31,7 @@ public:
virtual address_t getLinkRegister() = 0;
};
enum GPRegIndex
{
enum GPRegIndex {
RI_R0,
RI_R1,
RI_R2,