T32: FailT32 support for Cortex-M3

Currently working:
 - Connect/Disconnect, Read CPU info
 - CMM Script generation and T32 startup via cmake (make runt32)
 - Read/Write Register, Read Program Pointer
 - Read/Write Memory
 - Single Breakpoint
 - Setting Memory Breakpoint

TODO:
 - Fix mock aspect for T32_GetRam.
 - Fix Thumb2 bit in function addresses from ELFReader
 - Evaluate memory breakpoint hit

src/core/config/VariantConfig.hpp.in

@@ -6,6 +6,7 @@
 #cmakedefine BUILD_OVP
 #cmakedefine BUILD_QEMU
 #cmakedefine BUILD_T32
+#cmakedefine T32_MOCK_API
 
 #cmakedefine BUILD_X86
 #cmakedefine BUILD_ARM

src/core/sal/t32/T32ArmCPU.cc

@@ -22,6 +22,7 @@ regdata_t T32ArmCPU::getRegisterContent(Register* reg) const
       return m_regbuffer[reg->getIndex()];
     } else {
       /// TODO Error handling!
+      std::cout << "could not read register :(" << std::endl;
     }
   }
 	return 0; // we should not come here.
@@ -31,12 +32,15 @@ void T32ArmCPU::setRegisterContent(Register* reg, regdata_t value)
 {
   uint64_t mask = (1 << reg->getIndex());
 
+  // set value to be set by T32:
+  m_regbuffer[reg->getIndex()] = value;
   if(mask){
     if( T32_WriteRegister(static_cast<dword>(mask & lower), static_cast<dword>(mask >> 32), m_regbuffer) == 0 ){
       // No error, return value.
       return;
     } else {
       /// TODO Error handling!
+      std::cout << "could not write register :(" << std::endl;
     }
   }
 }

src/core/sal/t32/T32Mock.ah

@@ -2,12 +2,15 @@
   #define __T32MOCK_AH__
 
 #include <iostream>
+#include "config/VariantConfig.hpp"
 
-#if defined(BUILD_T32) //  && defined(T32MOCK)
+#if defined(BUILD_T32) && defined(T32_MOCK_API)
+#warning "T32 remote calls are intercepted by T32Mock aspect!"
 
 /* Mock aspect for testing without T32 HW attached. */
 aspect T32Mock
 {
+  // TODO: Let T32_GetRam's third parameter set to 0.
 	advice call("% T32_% (...)") : around ()
 	{
 	  std::cout << "[T32 MOCK] " << JoinPoint::signature() <<  " (";
@@ -21,6 +24,5 @@ aspect T32Mock
     *tjp->result() = 0;
 	}
 };
-
 #endif // BUILD_T32 && CONFIG_EVENT_BREAKPOINTS
 #endif // __T32MOCK_AH__

src/experiments/vezs-example/experiment.cc

@@ -26,13 +26,21 @@ bool VEZSExperiment::run()
   m_log << "Instruction Pointer: 0x" << hex << simulator.getCPU(0).getInstructionPointer() << endl;
 // Test register access
   Register* reg = simulator.getCPU(0).getRegister(RI_R1);
-  m_log << "Register R2: 0x" << hex << simulator.getCPU(0).getRegisterContent(reg) << endl;
-
-  reg = simulator.getCPU(0).getRegister(RI_R2);
   m_log << "Register R1: 0x" << hex << simulator.getCPU(0).getRegisterContent(reg) << endl;
 
+  reg = simulator.getCPU(0).getRegister(RI_R2);
+  m_log << "Register R2: 0x" << hex << simulator.getCPU(0).getRegisterContent(reg) << endl;
   simulator.getCPU(0).setRegisterContent(reg, 0x23);
 
+  reg = simulator.getCPU(0).getRegister(RI_R3);
+  m_log << "Register R3: 0x" << hex << simulator.getCPU(0).getRegisterContent(reg) << endl;
+
+  simulator.terminate();
+
+// STOP HERE
+
+
+
 // Test Memory access
   address_t targetaddress = 0x12345678;
   MemoryManager& mm = simulator.getMemoryManager();