From 2b36678737597a1260ff2604a1588c488c155fbd Mon Sep 17 00:00:00 2001
From: adrian <adrian@8c4709b5-6ec9-48aa-a5cd-a96041d1645a>
Date: Wed, 5 Dec 2012 13:05:24 +0000
Subject: [PATCH] Separated Architecture and CPUState classes for ARM/Gem5
 (*Architecture will be used in the campaign).

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1969 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
---
 src/core/sal/CMakeLists.txt                   |  2 +-
 src/core/sal/arm/{arch.cc => Architecture.cc} |  2 +-
 .../sal/arm/{arch.hpp => Architecture.hpp}    | 18 +++----------
 src/core/sal/arm/CPUState.hpp                 | 26 +++++++++++++++++++
 src/core/sal/gem5/Gem5ArmCPU.hpp              |  3 ++-
 5 files changed, 33 insertions(+), 18 deletions(-)
 rename src/core/sal/arm/{arch.cc => Architecture.cc} (94%)
 rename src/core/sal/arm/{arch.hpp => Architecture.hpp} (70%)
 create mode 100644 src/core/sal/arm/CPUState.hpp

diff --git a/src/core/sal/CMakeLists.txt b/src/core/sal/CMakeLists.txt
index 9ebad96d..92e691a3 100644
--- a/src/core/sal/CMakeLists.txt
+++ b/src/core/sal/CMakeLists.txt
@@ -69,7 +69,7 @@ if(BUILD_X86)
 	)
 elseif(BUILD_ARM)
 	set(SRCS ${SRCS}
-		arm/arch.cc
+		arm/Architecture.cc
 	)
 endif(BUILD_X86)
 
diff --git a/src/core/sal/arm/arch.cc b/src/core/sal/arm/Architecture.cc
similarity index 94%
rename from src/core/sal/arm/arch.cc
rename to src/core/sal/arm/Architecture.cc
index 95fa7e5a..bd9c5a31 100644
--- a/src/core/sal/arm/arch.cc
+++ b/src/core/sal/arm/Architecture.cc
@@ -1,4 +1,4 @@
-#include "arch.hpp"
+#include "ArmArchitecture.hpp"
 #include "../Register.hpp"
 
 namespace fail {
diff --git a/src/core/sal/arm/arch.hpp b/src/core/sal/arm/Architecture.hpp
similarity index 70%
rename from src/core/sal/arm/arch.hpp
rename to src/core/sal/arm/Architecture.hpp
index 384f2f3f..8b861cde 100644
--- a/src/core/sal/arm/arch.hpp
+++ b/src/core/sal/arm/Architecture.hpp
@@ -1,10 +1,11 @@
-#ifndef __ARM_ARCH_HPP__
-  #define __ARM_ARCH_HPP__
+#ifndef __ARM_ARCHITECURE_HPP__
+  #define __ARM_ARCHITECURE_HPP__
 
 #include "../CPU.hpp"
 #include "../CPUState.hpp"
 
 namespace fail {
+
 /**
  * \class ArmArchitecture
  * This class adds ARM specific functionality to the base architecture.
@@ -18,19 +19,6 @@ private:
 	void fillRegisterList();
 };
 
-class ArmCPUState : public CPUState {
-public:
-	virtual regdata_t getRegisterContent(Register* reg) = 0;
-
-	virtual address_t getInstructionPointer() = 0;
-	virtual address_t getStackPointer() = 0;
-	/**
-	 * Returns the current Link Register.
-	 * @return the current lr
-	 */
-	virtual address_t getLinkRegister() = 0;
-};
-
 enum GPRegIndex {
 	RI_R0,
 	RI_R1,
diff --git a/src/core/sal/arm/CPUState.hpp b/src/core/sal/arm/CPUState.hpp
new file mode 100644
index 00000000..53ae1b90
--- /dev/null
+++ b/src/core/sal/arm/CPUState.hpp
@@ -0,0 +1,26 @@
+#ifndef __ARM_CPU_STATE_HPP__
+  #define __ARM_CPU_STATE_HPP__
+
+#include "../CPU.hpp"
+#include "../CPUState.hpp"
+
+namespace fail {
+
+class ArmCPUState : public CPUState {
+public:
+	virtual regdata_t getRegisterContent(Register* reg) = 0;
+
+	virtual address_t getInstructionPointer() = 0;
+	virtual address_t getStackPointer() = 0;
+	/**
+	 * Returns the current Link Register.
+	 * @return the current lr
+	 */
+	virtual address_t getLinkRegister() = 0;
+};
+
+// TODO: Enum for misc registers
+
+} // end-of-namespace: fail
+
+#endif // __ARM_CPU_STATE_HPP__
diff --git a/src/core/sal/gem5/Gem5ArmCPU.hpp b/src/core/sal/gem5/Gem5ArmCPU.hpp
index 3abef361..914e2231 100644
--- a/src/core/sal/gem5/Gem5ArmCPU.hpp
+++ b/src/core/sal/gem5/Gem5ArmCPU.hpp
@@ -1,7 +1,8 @@
 #ifndef __GEM5_ARM_CPU_HPP__
   #define __GEM5_ARM_CPU_HPP__
 
-#include "../arm/arch.hpp"
+#include "../arm/Architecture.hpp"
+#include "../arm/CPUState.hpp"
 
 #include "sim/system.hh"