Fail* directories reorganized, Code-cleanup (-> coding-style), Typos+comments fixed.

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1321 8c4709b5-6ec9-48aa-a5cd-a96041d1645a

src/plugins/CMakeLists.txt

@@ -0,0 +1,6 @@
+# Note that we're allowing *multiple* plugins to be enabled at once.
+set(PLUGINS_ACTIVATED "" CACHE STRING "Activated plugins (a semicolon-separated list of fail/src/plugins/ subdirectories)")
+
+foreach(plugin_name ${PLUGINS_ACTIVATED})
+    add_subdirectory(${plugin_name})
+endforeach(plugin_name)

src/plugins/tracing/CMakeLists.txt

@@ -0,0 +1,18 @@
+set(PLUGIN_NAME tracing)
+
+#### PROTOBUFS ####
+set(MY_PROTOS 
+	trace.proto
+)
+find_package(Protobuf REQUIRED)
+include_directories(${PROTOBUF_INCLUDE_DIRS})
+PROTOBUF_GENERATE_CPP(PROTO_SRCS PROTO_HDRS ${MY_PROTOS})
+
+set(MY_PLUGIN_SRCS
+	TracingPlugin.cc
+	TracingPlugin.hpp
+)
+include_directories(${CMAKE_CURRENT_BINARY_DIR})
+
+## Build library
+add_library(${PLUGIN_NAME} ${MY_PLUGIN_SRCS} ${PROTO_SRCS} ${PROTO_HDRS})

src/plugins/tracing/README.txt

@@ -0,0 +1,10 @@
+Some hints on memory-access tracing in Bochs:
+====================================================================
+
+ - Instruction fetches: no memory accesses!
+ - INC ${MEM_ADDR} (increment in memory): a read and a write access
+ - CALL ${INSTR_ADDR} (call function): a single write access
+ - PUSH %{REG} (push on stack): dito
+ - PUSHF (push on stack): dito
+ - INT ${INTERRUPT#} (interrupt trigger): 3 write accesses
+ 

src/plugins/tracing/TracingPlugin.cc

@@ -0,0 +1,77 @@
+#include <iostream>
+
+#include "sal/SALInst.hpp"
+#include "sal/Register.hpp"
+#include "TracingPlugin.hpp"
+
+using namespace std;
+using namespace fail;
+
+bool TracingPlugin::run()
+{
+	MemAccessEvent ev_mem(ANY_ADDR);
+	BPSingleEvent ev_step(ANY_ADDR);
+	BaseEvent *ev;
+
+	if (m_iponly || !m_memonly) {
+		simulator.addEvent(&ev_step);
+	}
+	if (m_memonly || !m_iponly) {
+		simulator.addEvent(&ev_mem);
+	}
+	if(m_protoStreamFile) {
+		ps = new ProtoOStream(m_protoStreamFile);
+	}
+	
+	while (true) {
+		ev = simulator.waitAny();
+
+		if (ev == &ev_step) {
+			simulator.addEvent(&ev_step);
+			
+			address_t ip = ev_step.getTriggerInstructionPointer();
+			if (m_ipMap && !m_ipMap->isMatching(ip)) {
+				continue;
+			}
+
+			if (m_os)
+				*m_os << "[Tracing] IP " << hex << ip << "\n";
+			if (m_protoStreamFile) {
+				Trace_Event e;
+				e.set_ip(ip);
+				ps->writeMessage(&e);
+			}
+		} else if (ev == &ev_mem) {
+			simulator.addEvent(&ev_mem);
+
+			address_t ip = ev_mem.getTriggerInstructionPointer();
+			address_t addr = ev_mem.getTriggerAddress();
+			size_t width = ev_mem.getTriggerWidth();
+			if ((m_ipMap && !m_ipMap->isMatching(ip)) ||
+			    (m_memMap && !m_memMap->isMatching(addr, width))) {
+				continue;
+			}
+
+			if (m_os)
+				*m_os << hex << "[Tracing] MEM "
+				      << ((ev_mem.getTriggerAccessType() &
+				           MemAccessEvent::MEM_READ) ? "R " : "W ")
+				      << addr << " width " << width << " IP " << ip << "\n";
+			if (m_protoStreamFile) {
+				Trace_Event e;
+				e.set_ip(ip);
+				e.set_memaddr(addr);
+				e.set_width(width);
+				e.set_accesstype(
+				  (ev_mem.getTriggerAccessType() & MemAccessEvent::MEM_READ) ?
+				  e.READ : e.WRITE);
+				ps->writeMessage(&e);
+			}
+		} else {
+			if (m_os)
+				*m_os << "[Tracing] SOMETHING IS SERIOUSLY WRONG\n";
+		}
+	}
+
+	return true;
+}

src/plugins/tracing/TracingPlugin.hpp

@@ -0,0 +1,88 @@
+#ifndef __TRACING_PLUGIN_HPP__
+  #define __TRACING_PLUGIN_HPP__
+
+#include <ostream>
+
+#include "util/MemoryMap.hpp"
+#include "util/ProtoStream.hpp"
+#include "efw/ExperimentFlow.hpp"
+#include "config/FailConfig.hpp"
+
+#include "../plugins/tracing/trace.pb.h"
+
+// Check if configuration dependencies are satisfied:
+#if !defined(CONFIG_EVENT_BREAKPOINTS) || !defined(CONFIG_EVENT_MEMREAD) || !defined(CONFIG_EVENT_MEMWRITE)
+  #error This experiment needs: breakpoints & read/write memory access. Enable these in the cmake-configuration tool.
+#endif
+
+/**
+ * \class TracingPlugin
+ *
+ * \brief Plugin to record instruction traces and memory accesses.
+ *
+ * This plugin is supposed to be instantiated, configured and run by
+ * experiments needing instruction or memory access traces.  Tracing can be
+ * restricted to a memory or instruction address map; the restrictions are
+ * applied together, i.e., a memory access is only logged if neither its
+ * instruction address nor its memory address is restricted.
+ *
+ * TODO: document usage by example
+ * FIXME: handle configuration changes after tracing start properly
+ * FIXME: more explicit startup/shutdown; listener-based event interface needed?
+ *        -> should simulator.removeFlow make sure all remaining active events
+ *           are delivered?
+ * FIXME: trace a sequence of pb messages, not a giant single one (pb weren't
+ *        made for huge messages)
+ * FIXME: destructor -> removeFlow?
+ */
+class TracingPlugin : public fail::ExperimentFlow
+{
+private:
+	fail::MemoryMap *m_memMap; //!< address restriction for memory accesses
+	fail::MemoryMap *m_ipMap; //!< instruction address restriction
+	bool m_memonly; //!< log instructions only if they are memory accesses
+	bool m_iponly; //!< log instruction addresses only
+
+	std::ostream *m_protoStreamFile;
+	std::ostream *m_os; //!< ostream to write human-readable trace into
+	fail::ProtoOStream *ps;
+
+public:
+	TracingPlugin()
+	 : m_memMap(0), m_ipMap(0), m_memonly(false), m_iponly(false),
+	   m_protoStreamFile(0), m_os(0) { }
+	bool run();
+	/**
+	 * Restricts tracing to memory addresses listed in this MemoryMap.  An
+	 * access wider than 8 bit *is* logged if *one* of the bytes it
+	 * reads/writes is listed.
+	 */
+	void restrictMemoryAddresses(fail::MemoryMap *mm) { m_memMap = mm; }
+	/**
+	 * Restricts tracing to instruction addresses listed in this MemoryMap.
+	 * This restriction currently silently assumes instructions are only
+	 * one byte wide; make sure your memory map covers this first byte of
+	 * the instructions you want to trace.
+	 */
+	void restrictInstructionAddresses(fail::MemoryMap *mm) { m_ipMap = mm; }
+	/**
+	 * If invoked with memonly=true, instructions are only logged if they
+	 * conducted a memory access.  Defaults to false: All instructions are
+	 * logged.
+	 */
+	void setLogMemOnly(bool memonly) { m_memonly = memonly; }
+	/**
+	 * If invoked with iponly=true, only instruction addresses are logged.
+	 */
+	void setLogIPOnly(bool iponly) { m_iponly = iponly; }
+	/**
+	 * ostream to trace into (human-readable)
+	 */
+	void setOstream(std::ostream *os) { m_os = os; }
+	/**
+	 * ProtoStream file to trace into (trace.proto instance)
+	 */
+	void setTraceFile(std::ostream *os) { m_protoStreamFile = os; }
+};
+
+#endif // __TRACING_PLUGIN_HPP__

src/plugins/tracing/dump-trace.py

@@ -0,0 +1,47 @@
+#! /usr/bin/env python
+
+# create python bindings before running:
+# protoc --python_out=. trace.proto
+
+import trace_pb2
+import sys
+import struct
+
+if len(sys.argv) != 2:
+    print "Usage:", sys.argv[0], "tracefile.pb"
+    sys.exit(-1)
+
+trace_event = trace_pb2.Trace_Event()
+
+
+try:
+    f = open(sys.argv[1], "rb")
+except IOError:
+    print sys.argv[1] + ": Could not open file."
+    sys.exit(-1)
+
+while 1:
+    # Read trace length
+    try:
+        lengthNO = f.read(4)
+        if len(lengthNO) == 0:
+            break
+    except IOError:
+        print "Could not read data from file"
+
+    # Read Trace-Event
+    length = struct.unpack('!I', lengthNO)[0]
+    trace_event.ParseFromString(f.read(length))
+
+    # This works for any type of pb message:
+    #print trace_event
+
+    # More compact dump for traces:
+    if not trace_event.HasField("memaddr"):
+        print "IP {0:x}".format(trace_event.ip)
+    else:
+        print "MEM {0} {1:x} width {2:d} IP {3:x}".format(
+        "R" if trace_event.accesstype == trace_pb2.Trace_Event.READ else "W",
+        trace_event.memaddr, trace_event.width, trace_event.ip)
+
+f.close()

src/plugins/tracing/trace.proto

@@ -0,0 +1,10 @@
+message Trace_Event {
+	required uint64 ip = 1;
+    optional uint64 memaddr = 2;
+    optional uint32 width = 3;
+    enum AccessType {
+      READ = 1;
+      WRITE = 2;
+    }
+    optional AccessType accesstype = 4;
+}