Fail* directories reorganized, Code-cleanup (-> coding-style), Typos+comments fixed.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1321 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
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54
src/experiments/hsc-simple/experiment.cc
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54
src/experiments/hsc-simple/experiment.cc
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#include <iostream>
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#include <unistd.h>
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#include "experiment.hpp"
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#include "sal/SALInst.hpp"
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#include "sal/bochs/BochsRegister.hpp"
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#include "sal/Event.hpp"
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#include "util/Logger.hpp"
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#include "config/FailConfig.hpp"
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// Check if configuration dependencies are satisfied:
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#if !defined(CONFIG_EVENT_BREAKPOINTS) || !defined(CONFIG_SR_RESTORE) || !defined(CONFIG_SR_SAVE)
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#error This experiment needs: breakpoints, save, and restore. Enable these in the configuration.
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#endif
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using namespace std;
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using namespace fail;
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bool HSCSimpleExperiment::run()
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{
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Logger log("HSC", false);
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log << "experiment start" << endl;
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// do funny things here...
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#if 1
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// STEP 1
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BPSingleEvent mainbp(0x00003c34);
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simulator.addEventAndWait(&mainbp);
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log << "breakpoint reached, saving" << endl;
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simulator.save("hello.state");
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#elif 0
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// STEP 2
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log << "restoring ..." << endl;
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simulator.restore("hello.state");
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log << "restored!" << endl;
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log << "waiting for last square() instruction" << endl;
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BPSingleEvent breakpoint(0x3c9e); // square(x) ret instruction
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simulator.addEventAndWait(&breakpoint);
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log << "injecting hellish fault" << endl;
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// RID_CAX is the RAX register in 64 bit mode and EAX in 32 bit mode:
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simulator.getRegisterManager().getRegister(RID_CAX)->setData(666);
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log << "waiting for last main() instruction" << endl;
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breakpoint.setWatchInstructionPointer(0x3c92);
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simulator.addEventAndWait(&breakpoint);
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log << "reached" << endl;
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simulator.addEventAndWait(&breakpoint);
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#endif
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simulator.clearEvents(this);
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return true;
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}
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