Fail* directories reorganized, Code-cleanup (-> coding-style), Typos+comments fixed.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1321 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
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66
simulators/ovp/test1/platform/flakyMemory.cpp
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66
simulators/ovp/test1/platform/flakyMemory.cpp
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#include "flakyMemory.hpp"
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void createFlakyMem(
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icmProcessorObject processor,
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Addr lowAddr,
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Addr highAddr,
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const char *vlnvRoot
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) {
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icmBusObject *mainBus;
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icmBusObject *interBus;
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icmBusObject *mmcBus;
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icmMmcObject *mmc1;
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icmMemoryObject *memory1;
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icmMemoryObject *memory2;
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icmMemoryObject *memory3;
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#if 0
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// get location of mmc object file:
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const char *flakyMem = icmGetVlnvString(
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vlnvRoot,
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"ovpworld.org",
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"mmc",
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"flakyMemory",
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"1.0",
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"model"
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);
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#endif
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// create full MMC
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mmc1 = new icmMmcObject("mmc1", "/srv/scratch/sirozipp/build/lib/libflaky.so", "modelAttrs", 0, False);
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// create the processor bus
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mainBus = new icmBusObject("bus1", 32);
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// create the intermediate bus
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interBus = new icmBusObject("bus2", 32);
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// create the bus connecting the mmc to the memory
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mmcBus = new icmBusObject("bus3", 32);
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// connect mmc direct to processor ports
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processor.connect(*mainBus, *mainBus);
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// connect master port of MMC to bus
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mmc1->connect(*interBus, "sp1", False);
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mmc1->connect(*mmcBus, "mp1", True);
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if (lowAddr != 0x00) {
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memory1 = new icmMemoryObject("mem1", ICM_PRIV_RWX, lowAddr-1);
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memory1->connect("memp1", *mainBus, 0x00);
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}
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memory2 = new icmMemoryObject("mem2", ICM_PRIV_RWX, highAddr-lowAddr);
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memory2->connect("memp2", *mmcBus, lowAddr);
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if (highAddr != 0xffffffff) {
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memory3 = new icmMemoryObject("mem3", ICM_PRIV_RWX, 0xffffffff-(highAddr+1));
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memory3->connect("memp3", *mainBus, highAddr+1);
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}
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mainBus->newBridge(*interBus, "br1", "sp2", "mp2", lowAddr, highAddr, lowAddr);
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// show the bus connections
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mainBus->printConnections();
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interBus->printConnections();
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mmcBus->printConnections();
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}
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